Author Topic: Why does JLC PCB keep asking this?  (Read 2477 times)

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Offline calvinglosterTopic starter

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Why does JLC PCB keep asking this?
« on: August 29, 2025, 12:50:12 am »
Everytime i place an order at JLC PCB they send me an email asking if they must use my paste layer for the paste stencil or the copper layer because my paste layer is smaller than the copper layer. Am i doing something wrong here? Is this not standard industry practice that the paste layer is smaller than the copper layer? I've asked JLC "Is this not normal should i change it?"  and they just ignore the question and continue to delay my orders and ask the same question every time i place an order. I do appreciate that they ask to make sure though. Im more trying to understand why they asking? i would assume that im doing something weird and they like "wait this is out of the norm lets rather ask what he wants"

 

Offline Psi

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Re: Why does JLC PCB keep asking this?
« Reply #1 on: August 29, 2025, 01:33:05 am »
They need confirmation which they should do to cover their ass.
1. They can make up their own paste layer based on the pads and some automatic logic to reduce large apertures to multiple smaller ones etc..
2. They can use what you provide them as-is

A lot of it comes down to what the person at the fab thinks when reviewing your paste files.
If it looks very generic with the paste apertures the same size as the pads and large openings that would obviously be too large to actually use then they will probably just make their own paste layer without questioning it. Because your layer is obviously  never going to work as-is.  But if it looks like you put a lot of effort into getting your apertures all the right size then they are going to think "hm.. this guy wants us to use his paste file so we better get that confirmed before we continue."


Sometime you want them to create the paste layer because they are the ones doing assembly so they know what size paste apertures work best with their machines so there's not too much solder or not enough.

So your really have to decide,

1. Do I supply my paste layer and put in the order comments "please use my layer as is'. (You might get soldering issues if your paste layer is not perfect and they don't notice it or correct it, or you might get emails asking you to change things on your paste layer)

2. Do I not supply my paste layer and let them create one from the pads sizes. (They are usually pretty good at this, getting things to solder correctly. but you may get solder on pads for no-place components or pads you might not want solder on)  So you may have to specify that if its important.
« Last Edit: August 29, 2025, 01:40:40 am by Psi »
Greek letter 'Psi' (not Pounds per Square Inch)
 
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Offline asmi

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Re: Why does JLC PCB keep asking this?
« Reply #2 on: August 29, 2025, 02:22:29 pm »
I don't know what they were thinking, but what would trip me would be vias right in the middle of paste windows for the QFN's EP, as it's recipe for solder wicking away and big voids forming as a result. Unless you use VIPPO, in which case forget what I just said.

Online tszaboo

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Re: Why does JLC PCB keep asking this?
« Reply #3 on: August 29, 2025, 02:48:42 pm »
Is this not standard industry practice that the paste layer is smaller than the copper layer?
It is, but there is a catch.
I know this because unfortunately this is a recurring issue with some assembly houses, always blaming the design engineers for their soldering issues.
IPC 7351 states that the design engineer doesn't need to know the stencil thickness, the flux content and all these kind of variables, so make the stencil file same size as the pad size, and the assembly house will make it smaller themselves.
It also means that if they put too much or too little paste on parts, that's on them.
 
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Offline thm_w

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Re: Why does JLC PCB keep asking this?
« Reply #4 on: August 29, 2025, 09:33:26 pm »
I don't know what they were thinking, but what would trip me would be vias right in the middle of paste windows for the QFN's EP, as it's recipe for solder wicking away and big voids forming as a result. Unless you use VIPPO, in which case forget what I just said.

If it were a high power motor driver, and thermal path through the epad is critical, then vippo might be needed.

As long as vias are either tented or open on both sides, I would expect this part to be OK. I don't expect a ton of wicking with 0.2mm vias (assuming they are that small).
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Online mikeselectricstuff

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Re: Why does JLC PCB keep asking this?
« Reply #5 on: August 29, 2025, 10:36:01 pm »
Maybe add a comment to your stencil order to use the paste gerber layer
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Offline Smokey

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Re: Why does JLC PCB keep asking this?
« Reply #6 on: August 29, 2025, 10:44:07 pm »
I wonder what you are doing that's flagging this.
I've used up to 2mill paste aperture shrink and never got any push back on that.

Now as I've said recently they ALWAYS push back on my panel designs, but I know why that is. 
I actually had to cancel a recent JLCPCB order and moved it to PCBWay because after 3 nights we made zero progress on getting the panel finalized.  Sometimes, especially around holidays, it feels like all their competent engineers are out of the office and they let the janitors handle technical issues. 
 

Offline calvinglosterTopic starter

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Re: Why does JLC PCB keep asking this?
« Reply #7 on: August 30, 2025, 04:44:09 am »
it feels like all their competent engineers are out of the office and they let the janitors handle technical issues.

 :-DD
 

Offline free_electron

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Re: Why does JLC PCB keep asking this?
« Reply #8 on: September 02, 2025, 03:02:17 pm »
Is this not standard industry practice that the paste layer is smaller than the copper layer?
It is, but there is a catch.
I know this because unfortunately this is a recurring issue with some assembly houses, always blaming the design engineers for their soldering issues.
IPC 7351 states that the design engineer doesn't need to know the stencil thickness, the flux content and all these kind of variables, so make the stencil file same size as the pad size, and the assembly house will make it smaller themselves.
It also means that if they put too much or too little paste on parts, that's on them.
IPC is to be taken with a big bag of salt, not a grain of salt.

For thermal pads you need to design windowpane apertures. Most assembly shops will not do that, giving all kinds of issues with pillowing, puddling, thermal starvation. And then they will blame the design. If you just give them a paste mask that is equal to the pad they will claim all kinds of problems.

I typically design the windowpane and let the CM do the fine tuning for stencil thickness and past/flux ratio used. They can contract the panes, nut not enlarge. There must be a 0.15mm spoke (more if there are vias in the intersection and you don't use VIPPO.

I did extensive work at a previous employer to come up with a windowpane design that is very forgiving and eliminates outgassing, puddling, voiding, starvation, blowthrough (solder pushing out the backside of the via in pad)  and pillowing issues. We were hell-bent on avoiding the need for VIPPO. The added cost would have been in the tens of millions of $. Our CM's ran multiple permutations of a test design on protoboards where we soldered dummy parts.
The design we came up with is based off an HP / IBM paper from the 80's where they already did a study on these things.

https://pcdandf.com/pcdesign/index.php/magazine/10676-btc-design-1603.

Figure 16 is the basis.








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Online tszaboo

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Re: Why does JLC PCB keep asking this?
« Reply #9 on: September 02, 2025, 06:43:50 pm »
Most assembly shops will not do that, giving all kinds of issues with pillowing, puddling, thermal starvation. And then they will blame the design. If you just give them a paste mask that is equal to the pad they will claim all kinds of problems.
Yeah, I send them a list of things they have to do. Like no component substitutions, check the shelf life of the components, and this. The list is like 30 things.
I honestly got fed up with all this, I have deadlines, certifications, design issues and everything to worry about, and have zero metal capacity left for some idiot, who cannot solder down a QFN to a board without making measurable % of faulty boards. Which did happen. So they receive the assembly instructions informing them in advance, that this is their responsibility.
Or the last one, that was using some flux that was so conductive, that it gave 20KOhm resistance between  some pads. I've never seen anything like that in my life, IDK what they used probably some solder used by plumbers. They had one warning, second batch came with the same issues, so there is not going to be a third batch.
Especially since upper management makes an "OMG what do we do with this" meeting after these things are found out.
« Last Edit: September 02, 2025, 06:51:47 pm by tszaboo »
 

Offline free_electron

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Re: Why does JLC PCB keep asking this?
« Reply #10 on: September 03, 2025, 04:11:45 am »
Or the last one, that was using some flux that was so conductive,
Water soluble will do that if not washed off. it  sucks moisture out of the air and becomes conductive. i've seen it as low as 1kilo-ohm between two 0.5mm pitch pins on a tqfp.
Don't use water soluble if you don't have a proper DI installation to wash it out.

these issues can also happen on no-clean if it is not fully activated. Always ask for a POST-bake, especially if you are going to conformal coat later. Active flux is a recipe for disaster. it will eat the traces off the board. Worst case it will allow dendrite / filament grow.
Board cleanliness is a big issue. I have them do a ROSE test. The chromatograph doesn't lie...
Automotive has very stringent rules to ionic (and other) contamination.
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Online tszaboo

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Re: Why does JLC PCB keep asking this?
« Reply #11 on: September 03, 2025, 01:01:46 pm »
Or the last one, that was using some flux that was so conductive,
Water soluble will do that if not washed off. it  sucks moisture out of the air and becomes conductive. i've seen it as low as 1kilo-ohm between two 0.5mm pitch pins on a tqfp.
Don't use water soluble if you don't have a proper DI installation to wash it out.

these issues can also happen on no-clean if it is not fully activated. Always ask for a POST-bake, especially if you are going to conformal coat later. Active flux is a recipe for disaster. it will eat the traces off the board. Worst case it will allow dendrite / filament grow.
Board cleanliness is a big issue. I have them do a ROSE test. The chromatograph doesn't lie...
Automotive has very stringent rules to ionic (and other) contamination.
It was manual soldering. I definitely didn't ask for it, it's what I got from a new supplier.
The "Water soluble" is very useful info. We had to clean every single board with flux-off chemical, maybe water would've worked. And yes, the flux was defiantly moisture sensitive.

Quote
How is ROSE Testing Performed?

To start the test, a bare circuit board or full assembly is selected as the sample for a given batch. The resistivity of a known volume of 75% isopropyl alcohol (IPA) and 25% purified water solution is measured and the solution is sprayed on the board, or alternatively the board can be immersed in the solution. The solution dissolves the salts and other ionic substances present on the board. The resistivity of the solution after it has been in contact with the board is measured. The results are reported in sodium chloride (NaCl) equivalent.
Interesting, I never heard about this test. I think it's not difficult to perform, I'll try it on the new assembly process (and flux).
 


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