Error about library path of Simulation Waveform Editor of Altera Quartus II

[rahpla00]

Hello

I am using simulation waveform editor (Altera Quartus II 64-Bit 14.0 Web Edition) to simulate a simple RS latch with verilog as follows.

---------------------------------------------------
module rs_latch (Clk, R, S, Q);
input Clk, R, S;
output Q;

wire R_g, S_g, Qa, Qb;

and(R_g, R, Clk);
and(S_g, S, Clk);
nor(Qa, R_g, Qb);
nor(Qb, S_g, Qa);

assign Q = Qa;
endmodule
---------------------------------------------------

The input setup of RS latch simulation in simulation waveform editor is as attachment.
And when I use "Run Functional Simulation" or "Run Timing Simulation", it would start to run a series processes, and I would get a error message as follows.
(only list part of error message because of the characters number limitation in this forum.)

--------------------------------------------------------------------------------------------
Determining the location of the ModelSim executable...

Using: C:\altera\14.0\modelsim_ase\win32aloem

To specify a ModelSim executable directory, select: Tools -> Options -> EDA Tool Options
Note: if both ModelSim-Altera and ModelSim executables are available, ModelSim-Altera will be used.

**** Generating the ModelSim Testbench ****

quartus_eda --gen_testbench --check_outputs=on --tool=modelsim_oem --format=verilog rs_latch -c rs_latch --vector_source="D:/FPGA/Lab03/Part1_RSLatch/rs_latch.vwf" --testbench_file="D:/FPGA/Lab03/Part1_RSLatch/simulation/qsim/rs_latch.vwf.vt"

Info: ************************************************** *****************
Info: Running Quartus II 64-Bit EDA Netlist Writer
.....................
....................

Completed successfully.

Completed successfully.

**** Generating the functional simulation netlist ****

quartus_eda --functional=on --flatten_buses=off --simulation --tool=modelsim_oem --format=verilog --output_directory="D:/FPGA/Lab03/Part1_RSLatch/simulation/qsim/" rs_latch -c rs_latch

Info: ************************************************** *****************
Info: Running Quartus II 64-Bit EDA Netlist Writer
........................
.......................

Completed successfully.

**** Generating the ModelSim .do script ****

D:/FPGA/Lab03/Part1_RSLatch/simulation/qsim/rs_latch.do generated.

Completed successfully.

**** Running the ModelSim simulation ****

C:/altera/14.0/modelsim_ase/win32aloem/vsim -c -do rs_latch.do

Reading C:/altera/14.0/modelsim_ase/tcl/vsim/pref.tcl

# 10.1e

# do rs_latch.do
# ** Warning: (vlib-34) Library already exists at "work".
#
# Model Technology ModelSim ALTERA vlog 10.1e Compiler 2013.06 Jun 12 2013
# -- Compiling module rs_latch

#
# Top level modules:
# rs_latch
# Model Technology ModelSim ALTERA vlog 10.1e Compiler 2013.06 Jun 12 2013
# -- Compiling module rs_latch_vlg_sample_tst


# -- Compiling module rs_latch_vlg_check_tst


# -- Compiling module rs_latch_vlg_vec_tst
#
# Top level modules:
# rs_latch_vlg_vec_tst


# vsim -L cyclonev_ver -L altera_ver -L altera_mf_ver -L 220model_ver -L sgate_ver -L altera_lnsim_ver -c -voptargs=\"+acc\" -t 1ps -novopt work.rs_latch_vlg_vec_tst
# Loading work.rs_latch_vlg_vec_tst
# ** Error: (vsim-19) Failed to access library 'cyclonev_ver' at "cyclonev_ver".
#
# No such file or directory. (errno = ENOENT)
# ** Error: (vsim-19) Failed to access library 'altera_ver' at "altera_ver".
#
# No such file or directory. (errno = ENOENT)
# ** Error: (vsim-19) Failed to access library 'altera_mf_ver' at "altera_mf_ver".
#
# No such file or directory. (errno = ENOENT)
# ** Error: (vsim-19) Failed to access library '220model_ver' at "220model_ver".
#
# No such file or directory. (errno = ENOENT)
# ** Error: (vsim-19) Failed to access library 'sgate_ver' at "sgate_ver".
#
# No such file or directory. (errno = ENOENT)
# ** Error: (vsim-19) Failed to access library 'altera_lnsim_ver' at "altera_lnsim_ver".
#
# No such file or directory. (errno = ENOENT)
# Loading work.rs_latch
# ** Error: (vsim-19) Failed to access library 'cyclonev_ver' at "cyclonev_ver".
#
# No such file or directory. (errno = ENOENT)
# ** Error: (vsim-19) Failed to access library 'altera_ver' at "altera_ver".
#
# No such file or directory. (errno = ENOENT)
# ** Error: (vsim-19) Failed to access library 'altera_mf_ver' at "altera_mf_ver".
#
# No such file or directory. (errno = ENOENT)
# ** Error: (vsim-19) Failed to access library '220model_ver' at "220model_ver".
#
# No such file or directory. (errno = ENOENT)
# ** Error: (vsim-19) Failed to access library 'sgate_ver' at "sgate_ver".
#
# No such file or directory. (errno = ENOENT)
# ** Error: (vsim-19) Failed to access library 'altera_lnsim_ver' at "altera_lnsim_ver".
#
# No such file or directory. (errno = ENOENT)
# ** Error: (vsim-3033) rs_latch.vo(76): Instantiation of 'cyclonev_io_obuf' failed. The design unit was not found.
#
# Region: /rs_latch_vlg_vec_tst/i1
# Searched libraries:
# ** Error: (vsim-19) Failed to access library 'cyclonev_ver' at "cyclonev_ver".
#
...................
...................
# No such file or directory. (errno = ENOENT)
# Loading work.rs_latch_vlg_check_tst
# Error loading design
Error loading design


Error.
--------------------------------------------------------------------------------------------

By the message, I think when it links to the library, it can not search the correct library path.
I know it links to the library by the "modelsim.ini" in the path "C:\altera\14.0\modelsim_ase\", and part content of "modelsim.ini" is as follows.

----------------------------------------------------------------
altera_mf = $MODEL_TECH/../altera/vhdl/altera_mf
altera = $MODEL_TECH/../altera/vhdl/altera
altera_lnsim = $MODEL_TECH/../altera/vhdl/altera_lnsim
lpm = $MODEL_TECH/../altera/vhdl/220model
220model = $MODEL_TECH/../altera/vhdl/220model
maxii = $MODEL_TECH/../altera/vhdl/maxii
maxv = $MODEL_TECH/../altera/vhdl/maxv
fiftyfivenm = $MODEL_TECH/../altera/vhdl/fiftyfivenm
...................
...................
----------------------------------------------------------------

I have tried all possible setting about the library path, but I still can't solve this problem.
Can someone help me to solve this problem or tell me how can I correctly link simulator to the library path?
Or did I miss some important steps here?
Look forwarding to your help.
Thank you very much!!!!

[Cyber7]

Hmmm.. the libraries in The Altera edition of Modelsim should have pre-compiled libraries.

In your project, verify Assignment->Settings->EDA Tool Settings->Simulation->Tool Name = ModelSim-Altera

Also verify the path at Tools->Options->EDA Tool Options->ModelSim-Altera  points to the correct path to the winXX binaries.