Since you have done MPR calibration during initial power-up, may I know why would you need "1 tunable PLL output for the read sampling" ?
May I also know how do you phase shift your incoming DQ data bits such that it is sampled at its middle by incoming DQS strobe ?
I am not using the DQS strobe as a clock for sampling the DQ. I'm using the DQS inputs as a 'data_enable' DDR input where the 'preamble' is used as a sync/reset read buffer position. Remember, when reading data, the DQS is in perfect sync with the read DQ.
The tunable PLL output clock goes to the 'input clock' for the DQ & DQS DDR input buffers and subsequent read data FIFO's input clock.
The PLL has the following optional inputs:
Phase_select, (Selects which one of the many outputs of a single PLL which you may wish to adjust the phase)
Phase_step_enable, (Steps the selected PLL output's phase by 1/16th to 1/64th of the PLL's reference clock output, IE 64 steps will shift the selected output by a perfect 360 degrees.)
Phase_direction, ( Step left or right.)
I'm only using 1 PLL, it just that I have 3 outputs enabled and I am adjusting the phase of clk #2 while I set the parameter that clk #1 is at 90 degrees and clk #0 is my reference 0 degree and it's the system clock. (So far, the power-up default phase 0 has always been chosen. I doubt it would move until you have the memory a few inches away from the FPGA, or you are going through a connector to a memory module. Then, I only expect the phase to move by 1-2 steps to the right.)
All Altera, Xilinx, & Lattice PLL have the same feature to step adjust in real time each of their PLLs multiple outputs individually with just 3 control signals.
My DDR3 controller (coming soon) is fully vetted and fully functional on real hardware. It's currently running on Arrow's 37$ DECA board seen here:
https://www.eevblog.com/forum/fpga/arrow-deca-max-10-board-for-$37/msg3453256/#msg3453256For playing, it is well worth the 37$ as it has so much on it including a 150$ MAX 10 FPGA with 512MB DDR3 ram, and a shit load of peripherals like Ethernet and HDMI, with demo code for running each.