Forth (e.g. Mecrisp-Stellaris) on a Zynq?

[rhb]

  I'll let Vivado generate bitstreams and just use forth to load them.  And that's provided Xilinx  doesn't have closed source code for loading them into the FPGA that you have to use.

No problem, all you need is 4 controllable lines to activate the JTAG port.  Xilinx does have some docs that show how to use a processor to bit-twiddle the JTAG port to download an FPGA configuration.  That part hasn't changed in about 4 generations.

Jon

Thank you.  I had assumed from what I'd read and the basic nature of the task it was doable.  But it's nice to have confirmation.

Unfortunately, at the moment I'm running electrical power in my  wood and metal shop building.

[brucehoult]

The sort of application I have in mind is a DSP pipeline.  So it's really just wiring up adders and multipliers with coefficients in the local memory blocks.  That's several orders of magnitude simpler than the typical the typical FPGA configuration problem.

All the forth word would do is load a bitstream into the appropriate section of the FPGA.

I'm not so sure that's practical without a multi-MM effort.

What you *could* do easily is make up a Verilog/VHDL design in the conventional way, build in a lot of multiplexors, and expose the control lines for the multiplexors in registers that code running on the ARM can write to.

You could do quite a lot of instant runtime re-configuration without trying to muck about with doing partial bitstream loading yourself.

[rhb]

I'm concerned about doing this with the limited DSP resources of the smaller parts.

I really haven't thought about this in quite some time.  I've been consumed by setting up my lab and shop facilities.  I'm working on the electrical service in my shop at the moment.  That involved sorting a large quantity of conduit fittings, boxes, etc that Dad left me.

But between starting on the FPGA project and now I went on a major TEA binge and have an 8753B/85046A, 8566B and Tek 11801 sitting in my living room for lack of a rack.  I now have a *really* nice T&M stack, but also lots of chaos as a result.

I've been dealing with a lot of, "Before I can do A I need to do B, but that means I'll have to do C and D".

Fortunately it's all just for fun and most of it is interesting.  Finding and sorting stuff is just tedious.

[RFI]

Well hello, in the interest of FORTH on a Zynq, I found this thread so I thought I might resurrect it and see if there is still interest.

I came here by way of discovering Zepto Forth, which runs on a Cortex-M and works well apparently on a Pi Pico see here:

https://youtu.be/ri0VXzS5fiw

So I have heard a lot of talk about FORTH soft processors written in RTL, but why not run it on the Zynq ARM processor and interface to other stuff in the FPGA fabric (PL) ?
Otherwise I have been ocnsidering just using a Pi Pico and interface it to an Artix.

Any thoughts on this? Has anyone tired it or interested in trying it?
At this point I am questioning the value of any RTL Forth soft processor at all.

Who has experience interfacing Forth to an FPGA PL fabric that might comment on this? I need a way to read write RTL registers to control PL designs and an external Pi Pico seems like the simplest cheapest way to go about it, or possibly the same Zepto FORTH running on a Zynq ARM.

Thanks and regards.

[iMo]

I did with MecrispForth on the stm32F407, and with MecrispIce on the 16bit J1a forth cpu in ice40UP5k fpga (the first UP5k port actually, afaik). The enhanced j1a is a special stack cpu designed for Forth. Interfacing with 16bit wide "something" inside the fpga is rather easy, provided you spend some time with the stuff and you learn how it works. Otherwise I spent a lot of time with AmForth, FlashForth, and a pic32 based forth (I forgot the name of it). Mind the forth community is rather small and availability of libraries or ready to run code is limited to basic stuff (I assembled a 48bit floating point lib for Mecrispforth). Everybody writes his/her own words, reading/modding/debugging the sources with someones words is difficult unless you are almost at expert level.