Just been mucking around... if you use an MMCME2_BASE:
- Take the 100MHz system clock
- 100MHz / 5 = 20MHz (DIVCLK_DIVIDE = 5)
- 20Mhz * 48 = 960 MHz VCO frequency (CLKFBOUT_MULT_F = 48)
- 960MHz/78.125 = 12.288 MHz (CLKOUT[0]_DIVIDE_F = 78.125)
12.288 is a great I2S master clock frequency for most audio DACs running at 48000 S/s, as it is 512 times the sample rate e.g. for with a CS4244 DAC.