Author Topic: Xilinx ISE Ceil and Floor Can't Synthesize But Can Simulate?  (Read 2632 times)

0 Members and 1 Guest are viewing this topic.

Offline hal9001Topic starter

  • Regular Contributor
  • *
  • Posts: 138
  • Country: 00
Xilinx ISE Ceil and Floor Can't Synthesize But Can Simulate?
« on: August 17, 2023, 12:04:32 pm »
Im using Xilinx ISE 14.7 for Spartan 3A project. I want to use $ceil and $floor to calculate parameters in my verilog file.
Test bench simulates without error.
Synthesize gives this error
Code: [Select]
ERROR:HDLCompilers:26 - unexpected token: '$ceil'
ERROR:HDLCompilers:26 - expecting ';', found ')'
ERROR:HDLCompilers:26 - unexpected token: '$floor'
ERROR:HDLCompilers:26 - expecting ';', found ')'

The code is
Code: [Select]
parameter NUMBER = 2.5;
parameter integer CEIL_NUMBER= $ceil(NUMBER );
parameter integer FLOOR_NUMBER= $floor(NUMBER );

Is there a work around?


Cheers
 


Share me

Digg  Facebook  SlashDot  Delicious  Technorati  Twitter  Google  Yahoo
Smf

 

-->