Hi all! This is my first post here. I noticed some non-ideal behavior while messing with an inverting amplifier, and I'm having trouble pinpointing the cause of it. Here is a brief description of the set up: There is a 30 kHz sine wave connected to one end of a pot, and is also driving the input of an inverting amplifier, with gain of 1. The output of the inverting amplifier is connected to the other side of the pot, and the signal is output through the wiper, to the oscilloscope. By adjusting the pot appropriately I would expect to be able to null the signal to essentially zero, however what actually happens is the signal reduces to some minimum voltage, 40mV pp in my case. Turning the pot further causes the 40mV signal to phase shift by about 180 degrees and then grow larger again, but it never gets smaller than that minimum amplitude.
The only explanation I can think of is that the inverting amplifier has a small phase error, so the inverted signal is actually a few degrees more or less than 180 out of phase, instead of exactly 180. Doing the maths confirms that summing two signals slightly off from 180 degrees phase shift yields the same effect I am observing. Looking at the input and inverted input signal together on the oscilloscope, they look perfectly 180 degrees out of phase, but I can't really measure the exact phase difference with degree accuracy since I'm using a analog scope. I used a TL072 op amp to do the inverting, but just in case this was some weird bandwidth related thing I also tried the fastest op amp I had, which was an AD817. In either case the output was the same. Any ideas what would cause this to happen?
I did notice that in both cases, there was a slight ripple on the inverting input of the amplifier, so it was not holding a perfect virtual ground. I checked the noninverting input and it was firmly at ground, no ripple.
Maybe its somehow related to murphy's law but I figured out what was wrong, ten minutes after I posted the question nonetheless. In my defense I spent all yesterday afternoon trying to figure this out
Since I was prototyping the circuit on a breadboard, the parasitic capacitances combined with the high resistor values around the potentiometer introduced the problem phase shifts. I switched the pot out to a 1k pot with 2k resistors on either side and now the "minimum amplitude" is much less than 20mV. I'm gonna move this circuit onto a perf board now.
Maybe its somehow related to murphy's law but I figured out what was wrong, ten minutes after I posted the question nonetheless. In my defense I spent all yesterday afternoon trying to figure this out Since I was prototyping the circuit on a breadboard, the parasitic capacitances combined with the high resistor values around the potentiometer introduced the problem phase shifts. I switched the pot out to a 1k pot with 2k resistors on either side and now the "minimum amplitude" is much less than 20mV. I'm gonna move this circuit onto a perf board now.
Really? Are you sure?
Here are some things you might want to check...to be sure.
Vary the frequency of the input--if it is parasitic capacitance it will get worse as frequency goes up.
You did not provide details that a "wary" person would have--power supply voltage for example.
Did you measure the Vos of the opamp? What effect will Vos have on your circuit?
Did you try using AC coupling on in and out, might that help?
Edit: did you decouple your opamp?
Just some things to try.
Run a simulation and you'll see this error signal straight way. TL07... the seventies man.
Thanks for the ideas guys, I guess maybe the solution I came up with was premature. I ran the simulation on the TL072 and yeah it looks like there is over a degree of phase lag at 30 kHz, which definitely won't work. The AD817 has less than a tenth of a degree, which seems ok. Is there a spec in the datasheet that would indicate this phase lag so I can search for other parts that would work?
Building the circuit on perf board helped, but ideally I'd like to have the AC component of the signal null out to under a millivolt, and right now its around 15mV peak-peak.
Here are some other details of the circuit:
+/- 10V split supply
Op amp is decoupled with 0.1uF cap.
DC offset isn't too much a concern as long as its not drifting a ton. I'm only trying to null out the AC component of the signal.
Here is a rough description of phase shift in an inverting amplifier circuit:
1. If you look at the frequency response of a typical op amp that is "unity gain stable", you see a corner frequency at a very low frequency where the finite DC gain starts to decrease at higher frequencies. The open-loop gain of the amplifier at that frequency will have a -45 deg phase angle, governed by a single pole. Below that corner frequency, the phase angle starts at zero and increases to -45 deg by the corner. The DC gain value is less-well determined than is the unity-gain frequency, but the gain curve from this corner (wherever it lies) to high frequencies is determined by the unity-gain frequency (below).
2. At the other end of the response curve, you see the frequency (3 MHz for the TL071) where the magnitude of the gain falls to unity. This frequency is fairly well determined by the process. Below that frequency, the magnitude of the gain is approximately (unity-gain frequency) / (frequency).
3. Between these two extremes, the phase angle will be close to -90 deg over most of the range, which is also the most useful frequency range for the device.
4. The closed-loop response's phase angle is reduced from the -90 deg value by the relevant loop gain (product of open-loop gain and feedback ratio). See the usual textbooks for the details and equations. If there are capacitances around the feedback resistors, they modify the feedback ratio somewhat and must be included in this analysis. Tweaking the capacitances may be useful to improve the phase shift.
5. A proper Spice model for the op amp includes the dominant frequency response and should give reasonable accuracy when the feedback network (with parasitics) is included.
6. If you are choosing a device to obtain a low phase shift at a specified high frequency, you should estimate the open-loop gain (and thereby the loop gain) at that frequency, extrapolating backwards from the unity-gain frequency. You need enough loop gain to reduce the 90 deg value to your tolerance.
That was super helpful, thanks Tim! I hadn't made the connection of seeing this as a gain problem, but intuitively that makes sense. I'll open up some textbooks and try to figure out the math
I ran the simulation on the TL072 and yeah it looks like there is over a degree of phase lag at 30 kHz, which definitely won't work.
If you delay the original signal just a bit then you can null the combined output from 25mV to nearly zero. See my simulation with the added capacitor C1.
The main point in my reply is that the phase shift of the open-loop gain of a normal op-amp is substantial at usual
operating frequencies.