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CMOS NOR gates
Posted by
IvoS
on 06 Dec, 2013 22:11
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I will be using an IC (CD4001B) with quad of NOR gates but I need just one gate to use for my project. What is the good practice to do with the 3 remaining gates I won't use? Can I leave inputs and outputs floating?
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#1 Reply
Posted by
MatCat
on 06 Dec, 2013 22:13
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Generally good practice dictates grounding unused pins.
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#2 Reply
Posted by
IvoS
on 06 Dec, 2013 22:28
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Does it mean inputs AND outputs as well? Straight to ground or use a resistor?
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#3 Reply
Posted by
Marco
on 06 Dec, 2013 22:29
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Generally good practice dictates grounding unused pins.
That's going to make his IC run a bit hot.
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#4 Reply
Posted by
Skimask
on 06 Dec, 2013 22:49
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Ground unused inputs thru a 100K.
Outputs...Most of the time, I'll push those thru a 100K to ground, but not really necessary.
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#5 Reply
Posted by
Zero999
on 06 Dec, 2013 23:03
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Connect all unused inputs to either +V or 0V, it doesn't matter and leave the outputs unconnected.
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#6 Reply
Posted by
amyk
on 07 Dec, 2013 12:07
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Inputs should be tied to either logic level, outputs can be left "floating" since they'll be internally connected to one of the supplies due to the input levels. The goal is to avoid high-impedance nodes like CMOS inputs from floating somewhere in the middle of the switching range and causing both the upper and lower FETs to partially conduct, wasting power.
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#7 Reply
Posted by
SeanB
on 07 Dec, 2013 14:07
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You can also connect unused inputs to another gate output and it will work. Often I do that as the nearest pin is an output, and the extra load of a CMOS gate input makes no difference to a gate at low frequency. Just do not connect to the same gate input as then you make a very good oscillator/chip heater/smoke generator.
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Wow. So much bad advice... For something so simple.
Unused gate INPUTS should be tied , either directly , or thru a resistor , to VCC(supply)
Anything else is less optimal
Tying to ground: if ttl you have a vampire drain because the inputs can source current
Tying to another signal : the gates will follow the signal creating more power consumption (ttl always, more if low, cmos when toggling) and will create more crap in the emi .The more transistors switch the more crap
Input tying to vcc thru a resistor gives the advantage that you have access to the gate if you need to rework part of the circuit.
Now, if all you need is a single gate : get a singlegate logic chip a 74v1g02 should do fine
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#9 Reply
Posted by
filip_cro
on 07 Dec, 2013 17:01
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@free_electron
NOR gates: if inputs are high, state is low and TTL will use more power.
And thread is about CMOS.
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#10 Reply
Posted by
Zero999
on 07 Dec, 2013 18:31
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Tying to ground: if ttl you have a vampire drain because the inputs can source current
How? The inputs are high impedance to DC. The power dissipation in a CMOS gate will close to zero as long as both the inputs are connected to either +V or 0V.
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#11 Reply
Posted by
SeanB
on 07 Dec, 2013 19:14
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He is right as a general rule, works for CMOS and TTL in all cases without exeption. The example I gave was for low frequency ( close to DC or if you like you can read the blinkenlights by eye without problems), and the others are also usable for certain cases, perhaps to get desired inputs on a gate unused in the device but one that does have an effect like an enable or a direction selection.
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@free_electron
NOR gates: if inputs are high, state is low and TTL will use more power.
And thread is about CMOS.
Doesn't matter.
You have no control over static output consumption in TTL. Only over input consumption. Tying the inputs high prevents vampire draw.
The rules i gave make sure the design will work irrespective if you use CMOS or TTL logic and guarantee the lowest power consumption and least EMI problems while guaranteeing gate re-use.
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#13 Reply
Posted by
westfw
on 09 Dec, 2013 05:58
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F_E means "real" TTL, not those newfangled 74yyyxxxx series chips that are actually CMOS.
Real TTL actually has current into/outof the inputs, and the current to GND is higher than the current to Vcc.
With any modern CMOS-based logic, I don't think it will matter whether you tie the inputs to Vcc or GND.
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Correct. Cmos doesn't care.
Real ttl is 74 ,ls,a,as,als,f, and others that are bipolar based.
You can draw current from the input. The input is an emitter.
That is where fan-in and fan-out comes from.
You can only connect x inputs to an output because otherwise you overload the output with the current coming from inputs.