When I read that, You are saying you have built all the test equipment that you use! If true then great, but double standards are bad.
True but no eeprom programmer needed so what is saved can buy a Z80
And the NSC800 can be a small step in the future after learning the basics.
Break a big project down in to small simple steps that you can test. After a time you have that big project.
Here one step is Wiring, it has to be perfect
hi again,
sorry for not replying for a while now, I was improving the NSC800 testing circuit and I added the following:
1x 74LS374 for de-multiplexing the lower 8-bits of the address bus
ohh! I got ur point!!
the 74LS374 is edge triggered clock while what I really needed was state triggering clock of the 74LS373...
so even the 74ls273 would not work...
ohh! I got ur point!!
the 74LS374 is edge triggered clock while what I really needed was state triggering clock of the 74LS373...
so even the 74ls273 would not work...
Not quite correct here.
You could have a chip that triggered on a falling clock trigger.
What would be the difference between a falling clock trigger and the 74LS373?that A0-A7 is load on the edge of the ALE signal in 74LS374.
conversely the A0-A7 it is loaded when the ALE signal goes high meaning not on the transition in 74LS374.
ohh! I got ur point!!
the 74LS374 is edge triggered clock while what I really needed was state triggering clock of the 74LS373...
so even the 74ls273 would not work...
Not quite correct here.
You could have a chip that triggered on a falling clock trigger.
What would be the difference between a falling clock trigger and the 74LS373?
If you use a 74LS374
Input is captured on positive edge, output sees no more changes. If input is still changeing then output is wrong.
If you use a 74LS373
Input starts showing on output when level is high and follows all changes to input. Changes stop when low.
The #3
You do not see input on output until you have the negative edge.
At high speed with NSC800 a 74LS374 can give an invalid A0-A7 address.
The 74LS373 will pass the changing address to down stream devices giving a little more time to these devices if address is stable. Change stops on ALE going low which is when NSC800 says A0-A7 should be stable.
The #3 would work fine also, but you would not have the extra time that A0-A7 might be stable for down stream devices.
Now think how a simple change like a 74LS373 being replaced by a 74LS374 messes with you.
Could be a very hard to find problem. Might not happen but once in a 1000 address requests.
An inverter connected to clock input 74ls374 does change the edge.
You have a slow #3
What else happens when you do just this much?
Everything takes time. The inverter delays the change 74ls374 clock signal.
You are now capturing A0-A7 at a later time. Is A0-A7 still valid at this time?
You have also reduced the time A0-A7 is valid down stream from 74ls374.
At some point as clock speed increases the extra delay breaks the logic.
For something looking for Z80 type then OE needs to set output to tri-state during DMA and RESET. Z80 DMA needs all 16 address lines. Z80 chips like SIO will not work to full function.
An inverter connected to clock input 74ls374 does change the edge.
You have a slow #3
What else happens when you do just this much?
Everything takes time. The inverter delays the change 74ls374 clock signal.
You are now capturing A0-A7 at a later time. Is A0-A7 still valid at this time?
You have also reduced the time A0-A7 is valid down stream from 74ls374.
At some point as clock speed increases the extra delay breaks the logic.At 4MHz the minimum hold time from ALE low to AD7-0 tristate is 30ns. The 74LS04 adds 15ns delay maximum (typically 10ns), so it should be OK even at maximum CPU clock speed.
Obviously a 373 would be better, but it's not essential.QuoteFor something looking for Z80 type then OE needs to set output to tri-state during DMA and RESET. Z80 DMA needs all 16 address lines. Z80 chips like SIO will not work to full function.Some Z80 based computers had even more restrictions. For example the Mattel Aquarius (which I am currently working with) does not allow interrupts! And yet its 'Quick Disk' drive used a Z80 SIO.
For slow speed the 74ls374 with inverter should work.
Replace with a 74ls373 as soon as you can get one.
There are other logic families that you could use in place of LS
You said you have a 74ls273
You could replace grant's logic on his CP/M version that insures that ROM is in memory on cold boot with this chip.
The extra 7 could be used in the future change memory map or other functions.
in my test setup is 2MHz, so if I use 74ls04 it will definitely work
but wait! this means that I can run this chip if the CPU's clock out/system clock is 4MHz...
system clock in my test setup is 2MHz, so if I use 74ls04 it will definitely work
yup. Excellent! Sooner or later I will design a GB cart with EagleCAD, allowing people to have an alternative to the hack I presented here. Your EPROM programmer is excellent for this job too since it can program FLASH as well as NVRAM and UV-PROM
For UV-PROM, I got a marvelous UV-tube from recycling equipment from an hospital's division. It was used to make a surgical knife free from bacteria and/or other living microorganisms, but it's enough OK to be uses as UV-PROM eraser, it just takes more times, something like 25 minutes of exposition instead of 10, but it didn't costed an eye of my head. I just had to build a metal box to put the UV-tube inside
sorry C I was not able to run arduino bootloader on atmega32a, but I will try my best to get it up and running.