15k LE generated just for that operation. Whoops!
I bought a Digilent ARTY board about a year ago to play with the new tools from Xilinx. It was fairly inexpensive and came with a voucher for the license (really the reason I wanted it).
FYI - that voucher is pretty pointless. All of the Xilinx Artix models are covered under the free Webpack license, which does basically everything Design Edition does:
https://www.xilinx.com/products/design-tools/vivado/vivado-webpack.html
I bought a Digilent ARTY board about a year ago to play with the new tools from Xilinx. It was fairly inexpensive and came with a voucher for the license (really the reason I wanted it).
FYI - that voucher is pretty pointless. All of the Xilinx Artix models are covered under the free Webpack license, which does basically everything Design Edition does:
https://www.xilinx.com/products/design-tools/vivado/vivado-webpack.html
I think when I had checked into it, the ILA was not included.
The other nice thing about Vivado WebPack is that it includes a lot of IP cores including Microblaze and several peripherals including everything required to implement Ethernet. Not every Microblaze peripheral is included and in some cases there are limitations. One example is that 100 Mb Ethernet is included free, 1000 Mb is not.
The process of regenerating the block layout and creating a bitfile is truly grim on my Quad Core 2.8 GHz I7 680. I can't afford REAL speed but I thought a Quad Core 4.2 GHz I7 1770K would be a step up. Theoretically, I can overclock that chip up to 5 GHz so Vivado would only be half as grim. Still grim, but only half as grim as it is today.
Just for kicks I did a straight multiply/divide in VHDL using 32-bit operands. I think it resulted in about 15k LE generated just for that operation. Whoops! I think our complete CPU only took like 3k LE, although that was still quite mediocre.
I bought a Digilent ARTY board about a year ago to play with the new tools from Xilinx. It was fairly inexpensive and came with a voucher for the license (really the reason I wanted it).
FYI - that voucher is pretty pointless. All of the Xilinx Artix models are covered under the free Webpack license, which does basically everything Design Edition does:
https://www.xilinx.com/products/design-tools/vivado/vivado-webpack.html
I think when I had checked into it, the ILA was not included.
Yes, the ILA feature is included, even in the WebPack edition. I have run a couple of examples and, if I could ever figure out the constraints file, it might be a useful tool.
I was looking at the new AMD Ryzen Threadripper 1950X 16 core 32 thread chip (what a beast!) but Vivado will only use 8 threads and I don't do a lot of multitasking so what's the point? Still, sweet chip!
In terms of Vivado, here's a link to most of the reference material. There will be a test later!
https://www.xilinx.com/products/design-tools/vivado.html?resultsTablePreSelect=documenttype:SeeAll#documentation
OK, right off the bat, I am not an expert on Xilinx licensing! Even doing version upgrades terrifies me because I know I will need to get a new license and although the web site is vastly improved, it is still far from intuitive. But it works! At least it has so far. I just need to remember to include the checkbox for ISE 14.7 so license file covers both platforms.
Looking at the Digilent site, I don't see any reference to the voucher. I wonder if that is a thing of the past?
I agree, I don't think ILA was available early on. I'm not sure how much of the IP was available either. The fact that a simulator is included in the WebPack is quite a step up from ISE. I don't use simulation but it's nice to know it is there.
At some point, Xilinx realizes they are in the chip business, not the software business. I think the are beginning to loosen up. I realize they have a dumpster load of money involved in creating Vivado but that was then, this is now. It's a sunk cost, get over it! Get the software out there, it's not like it helps your competitor. The more people are talking about it, the more sales will eventually follow (except in my case). Especially make student versions available. Graduates tend to bring what they know.
I haven't been a big fan of Vivado. It is terribly slow, attention span shattering slow, VASTLY slower than ISE but maybe with more CPU horsepower I can overcome that. The workflow is pretty smooth and once I get more comfortable with the IDE, I'm sure I'll start to like it a lot more.
And I don't understand TCL. I have no idea how to create an XDC file! I think I may actually have to read a manual. Manuals are boring! I can copy and paste signal definitions but when adding the ILA, I have no idea what I am doing. The IP automation helps with some of it but I recall having to mess around in there to get it to work. Time to hit the books!
It's a good thing I didn't know that the MIG would crash on Win 10. The Microblaze EchoServer example at Digilent used the MIG to interface with the DDR and it runs all code from the DDR. I built it using Vivado 17.2 on Win 10.
Not to say there isn't some condition(s) under which it croaks under Win 10 but at least for that particular experiment MIG worked fine.
It's a good thing I didn't know that the MIG would crash on Win 10. The Microblaze EchoServer example at Digilent used the MIG to interface with the DDR and it runs all code from the DDR. I built it using Vivado 17.2 on Win 10.
Not to say there isn't some condition(s) under which it croaks under Win 10 but at least for that particular experiment MIG worked fine.
Maybe 17.2 corrected it. If you want to give it a try, open the MIG generator. Just use the defaults until you reach the select the Pin/Bank menu and select Fixed. Now select Read XDC/UCF. Let me know what happens.
No problem. You don't need to do anything really beyond opening the IP Catalog and run through the MIG. No need to play with the Microblaze or other IP. If you wanted to just play with their Ethernet Echo demo, just open the block diagram, select the MIG and customize. Again, just go through the menus until you get to the pin selection and then select the Read XDC/UCF. It's going to warn you about overwriting your settings but go ahead. What happens?