Hi,
I'm designing a self-powered USB device based on a STM32 microcontroller. Since it is self powered I cannot just tie the 1K5 pull-up resistor on D+ to 3V3 because that would result in more than 400mV on the D+ line when the USB cable is disconnected from the host. No big deal but would not pass the USB compliance test.
So I must sense VUSB and connect the 1K5 pull-up only when power is detected. Fine. Now, in every schematic I've checked out the 1K5 pull-up resistor is driven by a (usually PNP) transistor controlled by a GPIO pin of the microcontroller, and that's how I've done it so far just to avoid putting any thought into it. Now this design is pretty crowded and I'm really having difficulty finding space for the extra transistor and resistors, so I figured why can't I just drive the 1K5 resistor directly from one of the STM32 GPIO pins.
I've read as much as I've found regarding this particular feature of the USB bus, but nowhere I found a requirement and would result in the need for using a transistor to drive the 1K5 resistor.
Am I missing something?
There should be no problem driving it with a pin directly (since pin is driven by transistors too). Btw, some STM32 devices have builtin pullup (check reg OTG_FS_DCTL bit SDIS).
Yep. I've been testing the design and so far works nice and solid. No probs. So I keep wondering WHY on earth if this is so obvious every reference design I see out there uses a discrete transistor.
Im using an SRM32F103 part which do not have an OTG port, so no integrated resistors.
The designs that you see using the PNP BJT may be running their MCUs at 5V instead of 3V3.
That's it. The device must never pull down D+. Never, even when it's unpowered.
I was aware I should not pull down D+ when not in connected state, which can be easily accomplished by configuring the pin as an input. But when the device is powered down the parasitic resistor to VCC would pull D+ down somewhat.
Thank you. Now it's clear. I knew I was missing something pretty obvious.
That's it. The device must never pull down D+. Never, even when it's unpowered.
Because it must not pull-down in the opposite state.
I've recently been looking into making my own STM32F103 board and wanted to do the D+ pull-up-to-GPIO thing but, same as the OP, I couldn't figure out why most designs use a transistor.
The "never pull-down" reason seems somewhat valid, except that when unpowered the pin tested to be floating, with a 33M+ resistance to ground. I guess that's not guaranteed and ST might re-design the chip later to not behave like that but that's not very likely.
Also, if using a PNP transistor, if we assume that the chip could pull down through the GPIO, then wouldn't you still be pulling down through the PNP diode junction + GPIO ?
Has anything come up in the meantime since this post was originally made to explain why the pull-up-to-GPIO is not the most pervasively used one ?
PS: The GPIO pin has a 22R resistance when outputting logic 1 which doesn't seem like an issue.