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Hi,
I want to build a Dickson style charge-pump with several characteristics:
1) It is being driven by a clock signal but I would like to use higher voltages than those of the clock.
2) I would like to keep voltage drop and overall resistance as low as possible
I am proposing to try the following, but would appreciate it if anyone can spot issues before I start breadboarding and letting magic-smoke out.
Description: Clock signal drives a pair of BJTs such that a current at higher voltage flows into the caps of the charge-pump.
Instead of diodes, I am electing to use N-channel mosfets with the body diode blocking reverse flow. The Gate is pinned to an acceptable voltage by means of a resistor-zener network. Only 2 stages are shown.
I am planning to run this at 5Mhz.
Many thanks
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Hi,
That circuit won't work.
I want to build a Dickson style charge-pump with several characteristics:
1) It is being driven by a clock signal but I would like to use higher voltages than those of the clock.
2) I would like to keep voltage drop and overall resistance as low as possible
I am proposing to try the following, but would appreciate it if anyone can spot issues before I start breadboarding and letting magic-smoke out.
Description: Clock signal drives a pair of BJTs such that a current at higher voltage flows into the caps of the charge-pump.
Instead of diodes, I am electing to use N-channel mosfets with the body diode blocking reverse flow. The Gate is pinned to an acceptable voltage by means of a resistor-zener network. Only 2 stages are shown.
I am planning to run this at 5Mhz.
Many thanks
The PNP transistor is backwards and the NPN transistor has no current limiting base resistor.
A MOSFET driver could be used to level shift the clock signal to +Vcc. What's the value of +Vcc?
A Dickson charge pump also requires two pulse trains, in anti-phase with one another.
https://en.wikipedia.org/wiki/Voltage_multiplier#Dickson_charge_pump -
Hi Hero999,
Yeah, the PNP was a slip-up, I've corrected it thanks.
As my clock signal happens to be both well within limits but also operates the NPN in saturation mode, no resistor is needed.
With regards to needed 2 clock signals, I believe not, owing to the following tutorial from Dave:
https://youtu.be/I4ED_8cuVTU
Any issues with how the N-chan mosfets are utilized? -
Hi Hero999,
It still won't work. Why do you believe the transistor being saturated means it doesn't require a base resistor? The only reason why it wouldn't need one is if the output resistance of the clock source is high enough to limit the current to a safe level.
Yeah, the PNP was a slip-up, I've corrected it thanks.
As my clock signal happens to be both well within limits but also operates the NPN in saturation mode, no resistor is needed.
Now you have the PNP transistor smoking too. Even if you added base resistors, the circuit is still no good. The multiplier circuit needs a push-pull output for the clock signal. A PNP transistor connected to +Vcc, can only pull up, not down, so it can only charge the capacitors.QuoteWith regards to needed 2 clock signals, I believe not, owing to the following tutorial from Dave:
I haven't seen that video and can't watch it at the moment, but if only one clock signal is used, you'll only get half the multiplication factor.
https://youtu.be/I4ED_8cuVTU
Any issues with how the N-chan mosfets are utilized? -
Why do you believe the transistor being saturated means it doesn't require a base resistor?
I don't. As a current source, I believe then clock is within what the base can take AND still operates the BJT as a switch, however it's no trouble to throw a resistor between them.
I'm perfectly happy to "only" charge the caps, since the load will discharge them. However, if using a 2nd clock signal would improve performance that's certainly something I want to look at doing. -
Base-emitter junction is sort of a diode. Without current limiting it's almost a short-circuit (with a ~0.7V drop). Please do not omit base resistor.
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If the clock is current limited, then that will be fine, but a base resistor will still be required for the PNP transistor.Why do you believe the transistor being saturated means it doesn't require a base resistor?
I don't. As a current source, I believe then clock is within what the base can take AND still operates the BJT as a switch, however it's no trouble to throw a resistor between them.QuoteI'm perfectly happy to "only" charge the caps, since the load will discharge them. However, if using a 2nd clock signal would improve performance that's certainly something I want to look at doing.
The load will not discharge the capacitors. The clock source needs to be able to both source and sink current, in other words switched alternately between +Vcc and 0V, for this circuit to work. It will not work with a single transistor connected to +Vcc, which will do nothing. -
but a base resistor will still be required for the PNP transistor.
Ahh, good point, I hadn't thought of that. Right, noted. Thanks.The load will not discharge the capacitors.
I don't understand WHY you think the load won't discharge the caps. They can't discharge any other way. Are you telling me that you'd happily stick your finger on that last cap and expect not to get zapped by it?The clock source needs to be able to both source and sink current, in other words switched alternately between +Vcc and 0V, for this circuit to work.
Dave's tutorial still clearly shows otherwise, and the charge-pump in my version is a direct copy with only 2 exceptions: That I am using the PWM to drive the BJTs and a higher voltage/current rather than directly, and I have replaced diodes with NChan Mosfets (with gate pinned to an appropriate voltage)
Here is the original (Dave's, as per video) version, where Vcc is +3v and the clock is +3 or 0v (note, not -3v)
Here is my updated version intended for a higher voltage than the clock itself can provide:
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The load will not discharge the capacitors.
I don't understand WHY you think the load won't discharge the caps. They can't discharge any other way. Are you telling me that you'd happily stick your finger on that last cap and expect not to get zapped by it?
I got it wrong earlier, when I said the capacitors won't discharge. I should have said they will not charge, unless the clock node is connected to 0V, every half a cycle.
With a clock which can only source current, the maximum output voltage will be +Vcc - all the diode drops. If +Vcc is under 50V or so, I'd have no problem with touching the output. To find out why it won't work, do more reading up on how the circuit actually works, paying extra attention to the current flow, in the clock part of the circuit.Quote
I bet you that Dave's tutorial shows a CMOS output such as a microncontroller or logic gate driving the circuit, not an open collector PNP transistor.The clock source needs to be able to both source and sink current, in other words switched alternately between +Vcc and 0V, for this circuit to work.
Dave's tutorial still clearly shows otherwiseQuoteand the charge-pump in my version is a direct copy with only 2 exceptions: That I am using the PWM to drive the BJTs and a higher voltage/current rather than directly, and I have replaced diodes with NChan Mosfets (with gate pinned to an appropriate voltage)
Here is the original (Dave's, as per video) version, where Vcc is +3v and the clock is +3 or 0v (note, not -3v)
Good, drawing the circuit like that makes it easier to understand why this won't work.
Imagine the PWM node is driven from a PNP open collector, as you've drawn below. When the PWM node is left disconnected and the power is applied, C18 and C20 charge to +Vcc - n diode drops. C19 and C21 do not charge up, because a complete circuit is required for current to flow and there's no return path for the current. When the PWM input is connected to +Vcc, current will briefly flow through C19 and C21, leaving one plate at +Vcc and the other at +Vcc - n diode drops, a total potential difference of a few hundred mV. When the PWM input is disconnected again, no current flows and nothing happens.
Now imagine the PWM node is driven from a push-pull output. When the power is applied and the PWM node is connected to 0V, all of the capacitors charge to near +Vcc - n diode drops. When the PWM node is connected to +Vcc, the negative plates of C19 and C21 are connected to +Vcc, taking their positive plates to +Vcc + the voltage on the capacitors. The diodes prevent them from discharging back into +Vcc, so they discharge into C20, C18 and the load. After many cycles, the voltage across the load increases and I'll leave it up to you to work out what the steady state voltage will be.
In short, the clock needs to be a push-pull output. Please look up push-pull and open collector outputs and note the important difference.QuoteHere is my updated version intended for a higher voltage than the clock itself can provide:
Now try simulating/building it, then figure out for yourself, why it's not working.
Oh and BJTs, in that configuration will not switch at 5MHz, try 20kHz to start with.
You should use a MOSFET driver IC to convert the clock input to +Vcc. It's certainly the easiest way. Try the IX4428N, which has both an inverting and non-inverting output.
http://www.ixysic.com/home/pdfs.nsf/www/IX4426-27-28.pdf/$file/IX4426-27-28.pdf -
Ok, got it, that makes sense now. I was not aware that CMOS offers a return path to ground.
I'll work out how to use mosfets to put a push-pull circuit on the end of that thing. Thanks
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Oh almost forgot.. assuming the whole thing is driven properly (I like the look of that driver IC) is my implimentation of mosfets instead of diodes practical?
I saw this:
https://upload.wikimedia.org/wikipedia/en/thumb/6/64/Dickson_MOSFET_doubler.svg/1280px-Dickson_MOSFET_doubler.svg.png
And figured the best way to make it actually work would be with zeners as per my original circuit., -
I'd say zener is connected incorrectly. It should be connected between source and gate, imho.
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I'd say zener is connected incorrectly. It should be connected between source and gate, imho.
What would the advantage be of doing it that way rather than as a zener voltage-regulator? -
It would clip gate voltage to zener voltage. With current arrangement, if Vcc is too high, gate will be blown. Although, may be I don't understand the circuit.
On the other hand, gate resistors (needed to limit zener current) would limit switching speed. -
Ah, no, the present arrangement clips the supply to the Zener voltage even if Vcc varies (within reason) because anything over that value is shunted by the Zener, with the resistor bearing the brunt of the current (protects the Zener)
However, switching speed is of concern, and i’m certain I can find diodes that will easily handle the current without any issues, so perhaps your way is better, which would give a voltage of Vcc - Zener voltage
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Ah, no, the present arrangement clips the supply to the Zener voltage even if Vcc varies (within reason) because anything over that value is shunted by the Zener, with the resistor bearing the brunt of the current (protects the Zener)
However, switching speed is of concern, and i’m certain I can find diodes that will easily handle the current without any issues, so perhaps your way is better, which would give a voltage of Vcc - Zener voltage
Perhaps I am misunderstanding you here, but your "present configuration" sets a maximum voltage on the MOSFET gate with respect to ground. This would be understandable for an N-channel MOSFET with its source connected to ground, but it isn't - its an N- channel MOSFET with an unknown source voltage. If you are hoping to replace the diodes with MOSFETs to reduce to forward voltage, then it would be better to use P-channel MOSFETs with a zener from gate to source, and a resistor to ground. This puts a limit on the gate-source (Vgs) voltage, which is what turns on the transistor (negative for P channel, positive for N channel).
I mean no offence, but you seem to have misunderstood how transistors and MOSFET's work, and charge pumps for that matter, but so did I at first. Having LTspice is very handy, you can simulate almost anything and trust (within reason..you can get weird results sometimes as it deals with "ideal" components) but I would advise you to play about with MOSFET's and transistors on their own in LTspice, see how they work. Google and this forum can answer any questions and fill in any blanks.
Also, for charge pumps, google charge pump IC's - often they will have in internal diagram, perhaps not at the transistor level, but often more detailed than a block diagram. -
Just noticed you don't have part numbers set. In my experience with LTSpice this is not going to work and simulation will have nothing in common with reality.
So, if it's diode, it needs to be set to something (e.h., 1N4007). If it's a mosfet, set it to, e.g., irfz44n or whatever you are going to use. Otherwise it will use some default models that are completely wrong.
Bear in mind any simulator has limits. This one will not warn you if you, e.g., exceed voltage/current ratings on components (but it can show TDP). It also cannot produce correct results if you connect components wrong (like swapping in and out on a voltage regulator) because models have their own limits.