Edit: part appears to be fake, but not sure exactly what it is yet. dieshots on page 2. Take a simple split-rail non-inverting ~x100 opamp (TL074CN) amplifier:
Now let's tie the input to GND (0v) through a resistor.
I hope for 0V on the output, but know there will be some DC offset instead because of the opamp's input offsets.
Now this is the part that confuses me:
| [Resistor tying input to ground (ohms)] | [Amplifier output (mV)] |
| 200K | +30 |
| 100K | +70 |
| 10K | +160 |
| short | +200 |
The datasheet specifies a typical input offset of 3mV for this part, so for a x100 amplifier 200mV is within spec.
What I don't understand is why making the tie-to-ground weaker makes the output
less offset. I presume that I'm just interacting with the input stages in an unusual way (ie this is caused by something not modeled by input voltage+current offsets)? I note that if you increase the tie-down impedance to 1M then the output swings to negative.
What is the value of that resistor from (-) input to ground? I can't tell.
You do need to consider the input currents as well. This is why we try to match the resistance feeding the (+) and (-) inputs. The input currents flowing through a mismatched input resistance will result in an additional input offset voltage. This is probably what you are seeing.
Lower resistor = 1K.
That would suggest the balance point would be around 1K on the non-inverting input?
Lower resistor = 1K.
That would suggest the balance point would be around 1K on the non-inverting input?
Yes, it would. And I just looked at the input bias current and bias current offset for that opamp. It's in the 100 pA range, so with 1K input resistance the resulting input offset voltage would be perhaps 100 nV (insignificant here). And yes, the input offset voltage (typ spec around 3 mV) and your gain of 100 should give you around 300 mV output offset.
But for now, let's assume that the offset voltage is the typical 3 mV, and that's what drives your 200 mV output. With 199K Ohms difference in the input resistance, the 100 pA input-current generated offset voltage could be as much as 20 mV. This more than puts it in the range to cancel out any input offset voltage.
So I think that your input resistance mismatch just happens to cancel out the input offset voltage. If the offset voltage were zero, then the matched input resistors would give you a balance.
I'm just guessing though.
(200mV-160mV)/100/10kΩ=40mV/100/10kΩ=400µV/10kΩ=40nA
That's dangerously close to LM358/LM324 specs.
We have already had similar threads here. Did you buy it from China?
Post a picture of that thing.
With 199K Ohms difference in the input resistance, the 100 pA input-current generated offset voltage could be as much as 20 mV.
You've made an error with the decimal place there. 100*10
-12*200*10
3 = 20*10
-6 = 20µV.
(200mV-160mV)/100/10kΩ=40mV/100/10kΩ=400µV/10kΩ=40nA
That's dangerously close to LM358/LM324 specs.
We have already had similar threads here. Did you buy it from China?
Post a picture of that thing.
I agree, it might be fake.
Hmm, so you are suggesting that the effects of the input current offset are counteracting the effects of input voltage offset. That makes sense, they are supposed to be models of separate problems, so it would be valid for them to have opposing signs.
Yes it's a cheap eBay-obtained part. I assume the TL07x family is cheap enough to not be worth faking.
Not sure what you can really get from the pictures given how much variation exists across legit runs of parts. High-res attached, including a crude filing away of the epoxy.
Hmm, so you are suggesting that the effects of the input current offset are counteracting the effects of input voltage offset.
Yes, you could usually just assume it's the bias current flowing through your tie-to-ground resistance causing a voltage at the non inverting input which is cancelling the 2mV offset at the inverting input. But for that to work with your mV measurements the input bias currents would have to be 100s of times higher than the data sheet says.
I don't use those TL0xx op amps because the data sheets don't give any specs below +/- 15V supplies.
Two more things may happen:
1) damaged input (like damaged ESD diodes can contribute to input bias current), had such experience with NE5532 when I messed up with power rails
2) oscillation. I'd check with an oscilloscope that there is no oscillation. May be this is less of an issues with TL07x devices, but I had this problem with NE5532 when I had "weird" offset. A decoupling cap solved this problem (it was on a bread board).
Anyway, if input current in the order of tens of nanomaps, it's easy to measure it with a DMM.
At room temperature, the input bias current (not offset current, which is the difference between the offset bias currents of each input) on the TL072 should be too small to measure using the current setting of an ordinary multimeter.
One thing you could try is measure the voltage across the input resistor, at room temperature and after gently heating the TL072. It's a J-FET op-amp, so the bias current should have a positive temperature coefficient. If the current falls, after heating, then it's really a BJT input op-amp, not the TL072. BJT input op-amps have a negative temperature coefficient for bias current, because the hFE increases with temperature, so the base current falls.
JohnB: thanks for the link to the other faked TL* topic. I was also thinking of hunting for class B crossover distortion, I believe the TL074 is supposed to be biased (AB) to prevent it.
Zero999: Your temperature-based analysis technique sounds interesting. Surely this also depends on which way around the input diff pair has been constructed?
exe: Already suspected those two causes. Tried changing it for another spare and tried adding 100nF to both inputs then outputs, no dice. StillTrying's explanation makes the most sense.
I meant decoupling to power rails.
Also, unused opamps may oscillate, google "what to do with unused opamps".
I suggest: 1) properly terminate unused opamps 2) measure input bias current with DMM.
Actually, you can measure input offset voltage with DMM too, measuring a few mV of voltage is no problem, I did that
.
I also think you got a fake ebay TL074 that is actually a lousy old LM324:
1) The LM324 has bipolar PNP input transistors and the TL074 has Jfet input transistors.
2) The LM324 works fine with a supply as low as 3V and the TL074 needs a minimum supply of 7V (min 10V is recommended).
3) The LM324 is very noisy and the TL074 is low noise.
4) The LM324 has terrible crossover distortion and the TL074 has very low distortion.
5) The LM324 has trouble above a few kHz and the TL074 works fine to 100kHz.
With 199K Ohms difference in the input resistance, the 100 pA input-current generated offset voltage could be as much as 20 mV.
You've made an error with the decimal place there. 100*10-12*200*103 = 20*10-6 = 20µV.
Oops, thanks for checking! I was doing this with pencil and paper, which is usually a pretty good method for decimal placement. Apparently not this time. And there goes my "normal operation" theory.
Zero999: Your temperature-based analysis technique sounds interesting. Surely this also depends on which way around the input diff pair has been constructed?
Yes, you're right. The construction of the differential pair is the determining factor. The leakage current of reversed biased PN junction of a J-FET gate or MOSFET ESD protection diode has a positive temperature coefficient and the base current of the BJT has a negative temperature coefficient, as it's inversely proportional to the hFE, which has a positive temperature coefficient.
The only difference between PNP./P-channel and NPN/N-channel devices will be the sign. The magnitude will be positive or negative depending on whether it's J-FET or BJT. The sign will be less predictable for MOSFET inputs because the leakage ESD protection diodes will dominate the gate leakage, but the magnitude will still have positive temperature coefficient.
The exceptions to the above are rail-to-rail input or bias current compensated stages. A rail-to-rail input stage will have a mixture of both N and P devices and a bias compensated input stage will have internal current sources/sinks which cancel out the input bias current. It's highly unlikely a fake TL072 will be a more expensive bias compensated or rail-to-rail, so I think it can be ruled out.
Crossover distortion & freq performance:
Circuit used: x100 amplifier from first post. Output terminated 1K to 0V ground.
The 10KHz output looks 3db (power) down from the 1KHz. In a x100 amp that would make more sense for a 1MHz part (LM324) than a 3MHz (TL074) one. (edit: should I be using db of voltage or power here? I've forgotten, may be wrong).
Measuring input biasShorting the non-inverting input to ground through a dmm: less than 0.1uA, too small for my equipment to read.
Measuring the voltage across a 1M resistor between the non-inverting input and ground: around 8-9mV. It does appear to slightly increase when I heat the part.
Operating voltageSeems to work fine down at 5V (+-2.5), no changes in output waveform or input bias (if clipping is avoided).
ConclusionsIt's a
3554 opamp.
Well that's a bit annoying. Looks like I'll need to order some from a more reputable supplier, may as well branch out a bit more then too.
Now to try some more decapping...
Boiling-colophony (rosin) decapping has failed me. Lots of smoke and smell, no dissolution, not even enough to remove the part number. I think my heatgun is too cold. Might leave my next attempt to another day.
Boiling rosin? I have heard about it but never done it. IIRC it needs to really be heated to boiling and kept boiling for minutes.
Definitely start with cutting or breaking-off majority of the package, leaving only a small piece of epoxy around the die.
IIRC this crap dissolves metal too. Not a problem for most of the chip, though, as it is covered with a layer of glass.
Flames and electric heaters work too
https://www.eevblog.com/forum/projects/decapping-and-chip-documentation-howto/
Boiling rosin? I have heard about it but never done it. IIRC it needs to really be heated to boiling and kept boiling for minutes.
Definitely start with cutting or breaking-off majority of the package, leaving only a small piece of epoxy around the die.
IIRC this crap dissolves metal too. Not a problem for most of the chip, though, as it is covered with a layer of glass.
Flames and electric heaters work too
https://www.eevblog.com/forum/projects/decapping-and-chip-documentation-howto/
Yeah, I pre-snipped most of the chip away and ran for about 20 minutes. Some boiling occurred around the chip (I think it might have dissolved a bit of the leads) but it was mostly just smoke and smell. I think the smoke mainly came from small amounts of rosin climbing the test tube walls and getting heated more than the main pool.
Thanks for the link
Measuring input bias
Shorting the non-inverting input to ground through a dmm: less than 0.1uA, too small for my equipment to read.
Measuring the voltage across a 1M resistor between the non-inverting input and ground: around 8-9mV. It does appear to slightly increase when I heat the part.
Going by your 0-200k tests I make the current through the 0-200k 8-12nA, your 8-9mV across a 1M gives about the same value of ~10nA input bias current.
In a x100 amp that would make more sense for a 1MHz part (LM324) than a 3MHz (TL074) one. (edit: should I be using db of voltage or power here? I've forgotten, may be wrong).
Just use the Vpp down to 0.7 point. I usually find op amps can't make the data sheet's GBWP for outputs of 2-4Vpp but at a much lower 0.2Vpp output they can exceed it a bit.
Conclusions LM324
I have never boiled rosin but I presume that boiling means boiling, bubbles of rosin vapor coming from the whole volume of the liquid.
Bubbles around metal bits may have been hydrogen or some other crap if a reaction took place.
You are probably right about boiling vs hydrogen generation.
Sidenote: the crossover distortion of these LM324s is particularly annoying. When cascading the opamps and operating near/in the crossover region their output seems to pick up all sorts of interference (probably because it's going high impedance). It took me a while to realise that was the cause and throw another resistor in.
I have a question though:
Increasing input impedance at IN+ makes the output go
down. This looks like the input bias current is flowing into the pin rather than out of it.
It should be the other way around in an LM324, the bias current should flow out of the pin due to PNP inputs.
