Is it interesting in what way?
The startup and shutdown spikes are an issue and I'm still working on figuring out a way to mitigate them based on suggestions I've gotten but haven't had much time for it lately so I'm not quite there yet. I've tried asking about this here but the only real response I got was that the design was shit and I should just buy off the shelf. Works fairly well for my needs, and other than the spikes, does what it was designed to do.
Oddly enough we recently had a discussion over on Tektronix list about a circuit that may have been included in their TM500 series PS-503 power supplies by a thoughtful designer to prevent output glitches during start up and shut down. Take a look at Q15 and Q115 on the PS-503 schematic.
From the theory section in the PS-503 manual:
Q15 and associated components make up a shut-down equalizer circuit. When the TM-500 series power module power switch is turned off, or power fails, the shut-down equalizer circuit will cause the supply (+ or -) that has the lightest load to reduce its output voltage to prevent spiking of the lightly loaded supply as the filter capacitor is discharged.
That looks like the design that Quasar electronics sell as a kit. I built one many years ago (probably 15 years) and it seemed to work ok though I don't think I ever looked at the output transients at the time!
I'm assuming this is the manual you're referring to, or at least similar enough in the schematic to use as a basis for study? I immediately spotted Q15-Q115 in the schematic but the quote is from the "Power Line Regulation" section 5-2 starting on page 27 at the bottom. The way it's worded makes it sounds like it's a feature for when the supply is in dual tracking mode. Either way, it's a solution that bears looking into, much appreciated.
I'm assuming this is the manual you're referring to, or at least similar enough in the schematic to use as a basis for study? I immediately spotted Q15-Q115 in the schematic but the quote is from the "Power Line Regulation" section 5-2 starting on page 27 at the bottom. The way it's worded makes it sounds like it's a feature for when the supply is in dual tracking mode. Either way, it's a solution that bears looking into, much appreciated.
That is the one. Their PS-501 power supply is similar but only has one side and lacks the Q15/Q115 circuit or I would have suggested it instead.
The designs for the PS-503 and the one you asked about use similar voltage and current control loops or-ed together with diodes. The PS-503 clamp circuit works on that same point to pull the output down preventing glitches which is why I mentioned it.
There is no relationship to dual tracking mode. The positive and negative supplies share a common ground and may be operated independently or with tracking. The Q15/Q115 clamp circuit operates on both no matter how they are configured.
I thought it might have something to do with being in dual tracking mode because Q15 is a 2N2222A and Q115 is a 2N2907A and their tied together in an odd way (at least to me) between the positive and negative supplies. I'm having a hard time seeing where this could tie into the above posted circuit. U45 is in the voltage loop and U55 is in the current loop but their configuration seems to differ a bit from the above schematic. Given that U45 outputs to Q85 irrespective of U55 which seems to correspond to Q2 I'd assume a test could be done by tying a variation of this into pin 6 of U2 out to ground.
I just realized that Q1 in the original schematic serves this very function. Now I'm wondering why it was ever removed.
I wonder why ther'es no minum load on the output ?,R12 is to big and doesnt count. usually emitter follower type Vregs benefit alot or even require a minumum current to maintain a decent regulation performace when sourcing low output currents <10mA . Thinking about it this is what a bench supply probably spends most of it's life doing with todays low power electronics devices. Would be interesting to see how it's performing at low output load currents .Do you have a sim available .?
The original op amps used were TL081's, the new version uses TLE2141's. I have a third supply sitting here that I was testing out for another member from the other forum and I think I'll hack Q1 back in and see how it performs. I really appreciate you pointing me to the PS-503, that made the light bulb go off when I started looking at it. If it works, I'll probably re-design the circuit once more and put things to rights.
Like most bench supplies, the minimum load requirement for this design only matters if collector leakage of the pass transistors is high which is possible but usually not a problem.
Like most bench supplies, the minimum load requirement for this design only matters if collector leakage of the pass transistors is high which is possible but usually not a problem.
Hi there David .
For me it's more of a problem of output impedance increasing at such low output currents and causing the load pole to move down in frequency .You can see it clearly in loop gain /phase plots of followers under light load ,but then when you do a transient response performance test you still get really good performance , even though now the loop phase margin has reduce to only a couple of degrees. Its good proof that source/emitter followers make such good inherant V regulators that even with a crappy loop at a 3 deg phase margin you still get great transient load/line performance . (if I get time over the weekend I will post a few plots showing exactly what I mean).Here In this slow static type supply it doesnt seem to be a big prob . but i bet would cause you trouble though if you ever wanted a dynamic V supply ,or in some other senario I havent yet thought about .
Just had another quick look at this schematic shows another more serious prob with the way the current sense amp U3 is controlling the pass transitor via U2 .This is not going to be stable since these two amps alone without any other poles will cause a close to a 180 phase shift (each contributing nearly 90 each in the way they are configured).
I tried simulating a similar setup and it was totally unstable in cc mode most of the time spice wouldnt even sim it .if your CC stays stable under most load then i'm a monkeys uncle.
The way to do it would be to let U3 control Q2 directly .(so the anode of D9 goes to the base of Q2 .And you put a 3K ish resistor on the output of U2 ,enabling U3 to directly pull Q2 base drive down.
Alternative would be to make U3 very low fixed gain( flat response so no phase shift)
but I prefer the former way.
If I feel like it this week ,I will post the quick spice analysis sometime .
Regards
p.s Correction ,when I said both opamps contribute 90 deg ,I was mistaken, the second opamp U2 only behaves like a follower to U3's input so contributes no gain or phase shift .I was to sloppy with my quick generic sim ,,but that still looks iffy loop . It's got no phase margin and it's teetering right on the brink and starts oscillating under slight changes .
Perhaps I or someone will do a more thourough sim this weekend.