Anyone knows transistors that are defining the base-emitter voltage not in the "Absolute maximum ratings" part of the datasheet? Or where they define that this is a normal operation of the transistor? I'm asking because I'm designing intrinsically safe circuits ( ATEX ) and it would be nice to use these techniques, for high power (or low leakage) zener circuits. But the notified body would just throw this back that we exceed 2/3 of the maximum rating (requirements for such circuits) so we are not compliant.
Anyone knows transistors that are defining the base-emitter voltage not in the "Absolute maximum ratings" part of the datasheet? Or where they define that this is a normal operation of the transistor? I'm asking because I'm designing intrinsically safe circuits ( ATEX ) and it would be nice to use these techniques, for high power (or low leakage) zener circuits. But the notified body would just throw this back that we exceed 2/3 of the maximum rating (requirements for such circuits) so we are not compliant.
Not sure about how those rules work, but are you saying that if you had a 15V zener you would only be able to use it up to 10V?
There is another downside on using a transistor as a zener: the tolerance of the break down voltage. The absolute maximum specs are kin dof minimum values. The actual value can be quite a bit higher.
I tried simulating this in lt spice and no dice! Well no clamping anyways. I guess I'll have to build it in real life.
I'm not sure anyone has modeled punch-through breakdown, i.e., the effect that gives rise to relaxation oscillators using E-B or C-B breakdown (the latter of which is famous for giving sub-nanosecond edges). Extreme nonlinearities are not easy to model, or to simulate in SPICE.
I tried simulating this in lt spice and no dice! Well no clamping anyways. I guess I'll have to build it in real life.
.model 2N3904_BD NPN(IS=1E-14 VAF=100 Bf=300 IKF=0.4 XTB=1.5 BR=4 CJC=4E-12 CJE=8E-12 RB=20 RC=0.1 RE=0.1 TR=250E-9 TF=350E-12 ITF=1 VTF=2 XTF=3 Vceo=40 Icrating=200m BVcbo=60 BVbe=6)
I added the following model (modified 2N3904):Code: [Select].model 2N3904_BD NPN(IS=1E-14 VAF=100 Bf=300 IKF=0.4 XTB=1.5 BR=4 CJC=4E-12 CJE=8E-12 RB=20 RC=0.1 RE=0.1 TR=250E-9 TF=350E-12 ITF=1 VTF=2 XTF=3 Vceo=40 Icrating=200m BVcbo=60 BVbe=6)
I'm not sure anyone has modeled punch-through breakdown, i.e., the effect that gives rise to relaxation oscillators using E-B or C-B breakdown (the latter of which is famous for giving sub-nanosecond edges). Extreme nonlinearities are not easy to model, or to simulate in SPICE.
I thought the BE junction gets damaged over time, with a reverse current?
you mute when the transistor is conducting, what you want is a high reverse voltage so when the transistor is off, when not muting, you don't clip half of the audio signal.
I'm attaching the output of the 0V96 digital mixer so you can see how they do it
EDIT, an interesting link with more details: https://www.electroschematics.com/9660/muting-transistor-attenuator-circuits-2sc2878/
I thought the BE junction gets damaged over time, with a reverse current?
It does but this does not matter for a low leakage clamp or Vbe zener diode.
I probably missed this but shouldn't the HEF4053 have internal ESD protection diodes? Why aren't these working? There is enough resistance in front of it to limit the current. I'd just remove the 1N4007s. Who thought those where a good idea anyway? And clamping to the supply voltage?
I probably missed this but shouldn't the HEF4053 have internal ESD protection diodes? Why aren't these working? There is enough resistance in front of it to limit the current. I'd just remove the 1N4007s. Who thought those where a good idea anyway? And clamping to the supply voltage?The transistor clamp may have to handle 0.5A until PTC heats up, that is probably too much for the internal diodes. The smart way to do it is to have a resistor between the transistor clamp and the chip, then you can control how much current the internal diodes must handle.
The transistor clamp may have to handle 0.5A until PTC heats up, that is probably too much for the internal diodes. The smart way to do it is to have a resistor between the transistor clamp and the chip, then you can control how much current the internal diodes must handle.Such a current will likely kill a transistor clamp as well. The HEF4053 from NXP is specified to have a maximum clamping current of 10mA.
But wouldn't this effect depend very much on the type of transistor process used and maximum current? It even seems some transistors are made for this purpose.
Years ago I experimented with trying to get BJT transistors to avalanche. The more modern ones just didn't want to avalanche at all.
If this damage also causes an increased leakage current is a good question - it at least seems possible, though it may no effect PNP and NPN transistors in the same way.