After reading your post...I decided to run some SPICE simulations of frequency response and changes in R1 and R2. Results are shown below. Based on this I will likely raise R2 to 100K and leave the jumper J3 out for most uses.....
If you increase R2 you will also increase current noise of the LT1037.
So you will definitely need a different OP-Amp with lower input bias current.
See Design Notes DN3, DN6 and DN140 of Linear Technology.
After reading your post...I decided to run some SPICE simulations of frequency response and changes in R1 and R2. Results are shown below. Based on this I will likely raise R2 to 100K and leave the jumper J3 out for most uses.....
If you increase R2 you will also increase current noise of the LT1037.
So you will definitely need a different OP-Amp with lower input bias current.
See Design Notes DN3, DN6 and DN140 of Linear Technology.A higher R2 will only increase the noise below the input RC passband. The noise of R2 is effectively shorted with the signal source in the pass band. The current noise generated by R2 matters and this is higher with a smaller resistor. An apparent increase in the effect of OPs current noise is due to higher gain at low frequencies. So one would need a different (e.g. addition stage) filter for the low pass to get an overall comparable response. In the pass band region the input capacitor is what matters when it comes to the current noise of the OP.
Still 100 K for R2 might be a little on the high side, as initial settling will take a considerable time.
For the OP it is not directly the input bias that matters, but the input current noise in asymmetrical mode (current for one input only). Some data-sheets might neglect the correlated part of the input noise, like it applies to an application with a high resistance at both inputs. So current noise spec's have to be taken with a grain of salt, especially with AZ OPs.
With simple OPs current noise correlates with input bias, but OPs like the LT1037 or OP07 have input current compensation and with these OPs input bias can be low despite of current noise. So a low bias does not per se guarantees low current noise. It is only a high bias that can guarantee a high current noise.
Note: I managed to find non-polarized electrolytic capacitors for the 1000uF and 2200uF coupling capacitors (Rubicon I think).
Do not forget to select the input capacitor for low leakage current (with maximum used input voltage active).
I fear that bipolar capacitors will have more leakage current than unipolar standard 85 deg C types.
(But you will shurely measure it and report here).
With best regards
Andreas
Note: I managed to find non-polarized electrolytic capacitors for the 1000uF and 2200uF coupling capacitors (Rubicon I think).
Do not forget to select the input capacitor for low leakage current (with maximum used input voltage active).
I fear that bipolar capacitors will have more leakage current than unipolar standard 85 deg C types.
(But you will shurely measure it and report here).
With best regards
Andreas
I will hedge my bets here as well and measure both bi-polar and polar types. It will be interesting. What sort of leakage current is acceptable or normal for this application?
I will hedge my bets here as well and measure both bi-polar and polar types. It will be interesting. What sort of leakage current is acceptable or normal for this application?
Here are some of my experiences over the last two months.
I have used the Nichicon UKL series of Low Leakage coupling capacitors with good results. I use the 2,200 ufd 35V model and they have less than 15na of leakage at 7V. With a new cap I charge it at it's rated voltage for a few days to make sure the dielectric is fully formed. I have not noticed any noise artifacts with them. At 32V the leakage is 65nA.
From a cold start my system is usable within an hour. A precharge battery would certainly help.
After my limited analysis and testing, I decided to use the ADA4522 Chopper for the 10,000x preamplifier. I parallel 4 amplifiers and I have a noise floor under 70 nVpp (0.1 to 10Hz). I tried several other op-amps before settling on the ADA4522. I actually need a little more gain to stay out of the noise floor of the Digital Scope.
The LT1028A Ultra low voltage noise bipolar, had way too much current noise for the 2,200ufd input capacitor, 600nVpp.
The OP627 Super JFET had way too much voltage noise, 500nVpp.
The OPA189 chopper had twice the voltage noise called out in the data sheet. Must have been current noise causing the 200nVpp.
Hope this helps!
I actually need a little more gain to stay out of the noise floor of the Digital Scope.
Overall my circuit is similar to Pipelie's design. I used his output filter values with Wima plastic leaded caps and R-R op-amps. After the input cap (two 2,200 ufd caps in parallel) and clamping diodes the signal splits into the input of four ADA4522 op-amps. They have a 200k MF (SMD 0805) feedback resistor and a 20 ohm MF to ground. These are all surface mount parts. I also use a leaded COG 0.1ufd cap across each 200k feedback resistor to minimize high frequency noise. The output of each amplifier passes through a 10k resistor to sum the signals together before feeding the output filter stage.
I have not asked Analog Devices yet if the two amplifiers in the ADA4522-2 package are completely independent or if they share a common clock. If they share a clock the input and output noise spikes will be correlated and you will not achieve the theoretical noise reduction from paralleling. Some dual and quad op-amps share a common bias circuit so a voltage overload on one op amp will affect the others in the same package.
I had a 12v battery handy to power the circuit so I use two diodes to develop a -1.2v bus and a +10.8v bus.
Overall my circuit is similar to Pipelie's design. I used his output filter values with Wima plastic leaded caps and R-R op-amps. After the input cap (two 2,200 ufd caps in parallel) and clamping diodes the signal splits into the input of four ADA4522 op-amps. They have a 200k MF (SMD 0805) feedback resistor and a 20 ohm MF to ground. These are all surface mount parts. I also use a leaded COG 0.1ufd cap across each 200k feedback resistor to minimize high frequency noise. The output of each amplifier passes through a 10k resistor to sum the signals together before feeding the output filter stage.
I have not asked Analog Devices yet if the two amplifiers in the ADA4522-2 package are completely independent or if they share a common clock. If they share a clock the input and output noise spikes will be correlated and you will not achieve the theoretical noise reduction from paralleling. Some dual and quad op-amps share a common bias circuit so a voltage overload on one op amp will affect the others in the same package.
I had a 12v battery handy to power the circuit so I use two diodes to develop a -1.2v bus and a +10.8v bus.
I actually need a little more gain to stay out of the noise floor of the Digital Scope.Hello,
Which scope do you use?
Usually you have at least a 20 MHz bandwidth limiter on a scope.
Better scopes have either some kind of oversampling (e.g. hi-res aquisition mode)
or a additional digital filter to further reduce scope noise.
For a 10 Hz bandwidth and enough horizontal sample points you can use
a 1 kHz bandwidth filter on the scope to reduce scope noise floor without spoiling the measurement.
with best regards
Andreas
The caps are Panasonic Series: M Typ: A 85°C 2000h.
Had two 3,3mF 25V for first test, one went down to ~2nA, the other to ~3,5nA @~11,5V.
They were formed @11,5V 48h + ~1week disconnected @20°C and <30%rH.
Perhaps my cheap SMPS with "high ripple" had an effect on that, for rechargeable batteries the positive effect with reflex/pulse charging is well known...
Tested with ADA4530-1 @12V as buffer for 12h with recording of voltage drop.
So the 2nA are before soldering, did not test after.
For the low pass filtering stages, there are quite a few caps and the values do not all make sense. There are plenty of low pass stages, so there should be no need to have the large caps at the 4 parallel ADA4522 stages. This would also alow to use the first stage only with higher bandwidth if needed.
R20 does not make that much sense with the up to 4 parallel 10 K resistors at the OPs. So likely C24 is too large.
The wiring of the lower two AD4522 is wrong.
There are still the sets of 3 caps for decoupling - this is only needed for super fast parts like 74AC... or OPs in GHz GBW range, not for a slow LT1012. The LT1012 is happy with just a 10 µF electrolytic cap somewhere on the board. For the caps layout is often more important than a pure number. An extra 33 nF at more than a 1 cm away from the chip does not help anymore an is more like a possible problem.
The layout is kind of a mess. With the very high overall amplification a simple ground plane may not be such a good idea, especially with the decoupling caps spread all over the board.
Using a +-9 V supply may not be the best option, as there is no real need for a high voltage. The ADA4522-4 is perfectly fine with just 4-6 V or so, but it needs quite some current.
Overall my circuit is similar to Pipelie's design. I used his output filter values with Wima plastic leaded caps and R-R op-amps. After the input cap (two 2,200 ufd caps in parallel) and clamping diodes the signal splits into the input of four ADA4522 op-amps. They have a 200k MF (SMD 0805) feedback resistor and a 20 ohm MF to ground. These are all surface mount parts. I also use a leaded COG 0.1ufd cap across each 200k feedback resistor to minimize high frequency noise. The output of each amplifier passes through a 10k resistor to sum the signals together before feeding the output filter stage.
I have not asked Analog Devices yet if the two amplifiers in the ADA4522-2 package are completely independent or if they share a common clock. If they share a clock the input and output noise spikes will be correlated and you will not achieve the theoretical noise reduction from paralleling. Some dual and quad op-amps share a common bias circuit so a voltage overload on one op amp will affect the others in the same package.
I had a 12v battery handy to power the circuit so I use two diodes to develop a -1.2v bus and a +10.8v bus.
I submitted a question to AD via their website asking about a common clock on the ADA4522-2 and ADA4522-4 parts. I will post a reply if I get one.
I understand that the value of the bypass caps seems very large for these op-amps, but that was what was used in the original circuit (470uF).
Do not forget to select the input capacitor for low leakage current (with maximum used input voltage active).
I fear that bipolar capacitors will have more leakage current than unipolar standard 85 deg C types.
(But you will shurely measure it and report here).
With best regards
Andreas