The whole idea was to use 6 independent timers with output compare to generate frequencies directly. Using timer interrupts was never an option because of the relatively large jitter. (especially on ARMs)
So one needs 6 independent timers. One timer with 6 output compare channels is not able to generate 6 different frequencies, just 6 different pulse widths.
Actually you can. Just set an interrupt for when the output compare triggers and update the compare register with the next trigger point in the interrupt service routine. The timer counter itself just runs freely and wraps back to zero.
Renesas' RX series has lots of powerful timers, but I don't know offhand if they have anything that fit your package requirements.
@nctnico: Thanks, glad you spelled it out. Apparently, my post did not explain the idea properly.
- at least 6x 16bit timers that can be used for frequency generation (50% duty cycle is sufficient, no pwm)
- 4x ADC
- Internal RC oscillator, at least 16Mhz
- cheap: < $1
- bonus points: programmable logic
What frequency range and granularity do you need ? Is internal or external oscillator needed ?
eg the EFM8LB1 has programmable logic & 72MHz sysclk, so it can produce 16b to up to ~ 1100Hz, and the 6 channel PCA can use HSO mode to SW manage multiple frequencies, up to some SW-overhead limit.
I'd expect something above 100kHz to be possible, via HSO and above 281KHz there is a 8b FreqOut mode, plus the programmable logic can toggle on any timer overflow.
Take a look at Cypress PSoC 4200 (ARM Cortex M0). There are several hardware timer blocks as well as programmable digital blocks that can be turned into timers.
I would second Andy. PSOC5 has enough macro blocks to spin up all sorts of crazy custom hardware in a really easy to use IDE.