If U4 is what I think it is (atmega328p or other atmega, board acting as an arduino of a form) then C3 probably ought to be ceramic not electrolytic, and the circle in the silkscreen suggests you were planning on putting a can shaped electrolytic there?
If it is indeed at atmega chip, then I assume you're either going to program it with fuses set to use an internal clock, or otherwise you'd need to add a crystal and some 22pF caps to the board to clock the chip with.
You've easily got space for much thicker traces in many places if your current requires them, I can't really judge from an image though if they are wide enough yet, I'm sure it will work as it presently is (assuming you've got your circuit concept and net list correct), but if the traces aren't thick enough they'll heat up when in prolonged use and you'll waste some power. For high currents, I'm not sure which traces of yours carry them, but above 1A I'd usually make sure to have several vias in parallel whenever a high current trace switches layers, however thick the trace is a standard sized via is only "good" for a certain current, widening a via (unless widened an awful lot) doesn't increase current carrying ability so well as simply having multiple vias, so several vias in parallel does better when currents are larger.
Left of J5 you have a trace joining in to a corner at a 45 degree acute angle, I'd recommend reshaping this slightly to not have that sharp acute point, acid traps during manufacture aren't that common with modern fab houses, but I was always taught not avoid angles tighter than 90 degrees and use a bit of extra trace to fillet off the corner.
As a personal preference from my designs, I'd recommend putting component values (or abbreviated versions) in the silkscreen layer beside the relevant parts, makes the board self-documenting when you're assembling it by hand so you don't have to keep referring to a spreadsheet of what value R5 takes and so on.