Impedance controlled PCBs

[nali]

So this is a first for me, I've done plenty of 2-layer and 4-layer PCBs but nothing high speed or RF. I now have the task of putting a LTE modem which uses a LGA footprint onto a 4-layer (hopefully) board so need to route the antenna signals out to some SMA connectors. This is a commercial project, and I'll be outsourcing to a fab/assembly house.

I don't have a problem with the actual routing; there are plenty of calculators out there to help with that but I'm not sure what the actual process of Impedance Control is when it comes to sending out the PCB for fabrication. Lets say for example I've used a 50 ohm Coplanar Waveguide and my dimensions are:
 
   trace width 15mil
   gap to groundplane 8mil
   prepeg thickness 10mil, Er 4.6

(These are just random values from Saturn toolkit BTW)

What exactly do I need to specify or instruct when I send the board out for manufacture?

Thanks

[schratterulrich]

With highspeed digital boards, I usually attach a pdf with the layerstack and the geometries of the impedance defined tracks.
Then I reference this pdf in the drill drawing.
They have to guarantee the impedance tolerance by delivering measurements of impedance coupons.
e.g.
For layerstack and impedance controlled traces see "6-layer_1.7mm.pdf"
Impedance of test coupons must be measured and reported.

[daqq]

Note that if you want to avoid a controlled board, for smaller lengths of RF strips you can generally get away with a non-impedance controlled board. It won't be perfect, but it will be OK for communications.

We design our stuff with the RF bits as close to the connectors as possible.

What exactly do I need to specify or instruct when I send the board out for manufacture?

This is a question for the fab, they will guide you.

[asmi]

What exactly do I need to specify or instruct when I send the board out for manufacture?

Include a text file (I usually name it !Info.txt) which contains the following:

Code: [Select]

All copper layers are 1 Oz (35 um)

File names for layers:
------------------------------------------------------------
1:Top.art - 0.035 mm
------------------------------------------------------------
PP - 0.15 mm (~2x1080H)
------------------------------------------------------------
2:GND.art - 0.035 mm |
------------------------|
Fr4 core - 0.13 mm | 0.2 mm FR4 core with 1/1 Oz
------------------------|
3:SIG1.art - 0.035 mm |
------------------------------------------------------------
PP - 0.37 mm (~2x7628H)
------------------------------------------------------------
4:SIG2.art - 0.035 mm |
------------------------|
Fr4 core - 0.13 mm | 0.2 mm FR4 core with 1/1 Oz
------------------------|
5:POWER.art - 0.035 mm |
------------------------------------------------------------
PP - 0.15 mm (~2x1080H)
------------------------------------------------------------
6:BOTTOM.art - 0.035 mm
------------------------------------------------------------

Other files:
SOLDERMASK_TOP.art and SOLDERMASK_BOTTOM.art - soldermask for top and bottom side
SILKSCREEN_TOP.art and SILKSCREEN_BOTTOM.art - silkscreen (legend) for top and bottom side
SOLDERPASTE_TOP.art and SOLDERPASTE_BOTTOM.art - solder paste for top and bottom side, this is for stencil
Artix100_Video_USB-1-6.drl - drill file for plated holes
Artix100_Video_USB-1-6-np.drl - drill file for non-plated holes
Artix100_Video_USB_plated.rou - route file for non-circular holes

Controlled impedance traces:
---------------------------------------------------------------------------------------------------------
| Layer | Reference plane | Single-ended 50 Ohm width | Differential 100 Ohm width/spacing |
|-------|-----------------------|-------------------------------|---------------------------------------|
| 1 | 2 | 0.2273 mm | 0.1988 mm/0.4 mm |
|-------|-----------------------|-------------------------------|---------------------------------------|
| 3 | 2 | 0.1363 mm | 0.1214 mm/0.4 mm |
|-------|-----------------------|-------------------------------|---------------------------------------|
| 4 | 5 | 0.1363 mm | 0.1214 mm/0.4 mm |
|-------|-----------------------|-------------------------------|---------------------------------------|
| 6 | 5 | 0.2273 mm | 0.1988 mm/0.4 mm |
---------------------------------------------------------------------------------------------------------

First table describes the stackup I wanted, while the second one sets out trace impedance. The fab will pick out the traces with parameters you've specified out of Gerbers and will adjust the stackup if needed to meet your specs. I always use metric values, but you are free to use imperial if that's what you used for routing.

[nali]

OK thanks for the replies. I suppose I need to choose a stackup, use default values for FR4, then let the PCB house tweak the geometry based on fab notes/instructions.

@daqq - yes I do plan to make the runs short, however on this device (Sierra Wireless WP7607) there are 3 antennas for LTE (main) LTE (diversity) and GNSS. Two are on the bottom of the device but one is on the side meaning the trace has to go "around the corner". Even so, max trace length is only about 30mm or so (hopefully, I've not started the board layout yet).