Design considerations for 8.5 digit front end

[MasterT]

..thus it seems no new particles will be discovered at CERN after the installation of the HPM7177 units.. 

Have no idea.
What I do know, is how de-glitch circuits operates. Here is some theories,
https://www.allegromicro.com/en/insights-and-innovations/technical-documents/hall-effect-sensor-ic-publications/chopper-stabilized-amplifiers-with-a-track-and-hold-signal-demodulator

 To null out charge injection spickes , sampling by adc must be in correct phase relation with chopping circuitry. Period.
 ADC's Internal buffer has great advantage to synchronize all processes. External AZ OPA, even the good one like max44251  (I'd think about crappy AD8628 as a joke),  configured as G=1 buffer has a few MHz bandwidth. There is no way to limit this band with G=1, so accumulated noise  jump up in x1000, and excellent 5.9 nV /sqrt(Hz) becomes 6 uV-RMS, or 36 (!!!) uVp-p. Now compare to about 50 nVp-p that internal buffer has.
 

 

[iMo]

So I don't see a point in a 10 M divider from 10 V to 2.5 V.

A 10M input resistance on all ranges, including the low voltage ones, can be important for consistency of measurements.  It is disconcerting when a range switch from say 2 to 20 volts results in a change of reading way outside of the accuracy specifications because the source resistance was not zero ohms.
..

.. for example the Fluke 8588A has got 10Meg only (I tried to switch it to Hi-Z with no success)..

[Kleinstein]

To null out charge injection spickes , sampling by adc must be in correct phase relation with chopping circuitry. Period.
 ADC's Internal buffer has great advantage to synchronize all processes.

Ideally one would have the ADC sampling syncronized with the chopper amplifier. However with relatively small spikes and some filtering between the AZ amplier and the ADC (e.g. the passive RC AA filter) one can get away without this with little penalty. The spikes from integrated chopper OPs are quite short and already reduced by the limited BW of the amplifier.
Using a SD ADC chip with an AZ amplifier is nothing new or special. It is regularly done with usually little problems.
The synchronization gives a slight advantage in this respect to the ADC internal buffer. Still the buffer also has limitations, e.g. with the INL, where external buffers can be better.

External AZ OPA, even the good one like max44251  (I'd think about crappy AD8628 as a joke),  configured as G=1 buffer has a few MHz bandwidth. There is no way to limit this band with G=1, so accumulated noise  jump up in x1000, and excellent 5.9 nV /sqrt(Hz) becomes 6 uV-RMS, or 36 (!!!) uVp-p. Now compare to about 50 nVp-p that internal buffer has.

The noise in the full BW of the amplifier does not really matter. The SD ADC in combination with the AA filter at it's input limit the bandwidth to a low value. One may have to take care that the chopper spikes are not causing aliasing though. So the RC filter at the ADC input is important, especially with AZ amplifiers/buffer that may have extra noise in the relevant frequency range.

The point with high input impedance is for the buffer before the divider - the 2nd buffer (may be 2 for pos and neg input) is a different thing. For the input side the max44251 or OPA189 are more like a poor choice for a more conventional DMM, as they have too much current noise (e.g. 600 fA/sqrt(Hz) for the max44251) and input bias. Here one needs some compromise and the AD8628 is about at a suitable point for a normal DMM  ( ~ 22 nV/sqrt(Hz) , ~ 40 fA/sqrt(Hz) and some 10 pA range input bias). The data-sheet value for the AD8628 current noise seems to be too optimistic - a common thing with AZ OP-amps. On the other side the bias specs often tend to be a bit pessimistic to cover a range of supply and CM voltages and input impedances. With care on about equal impedance one can often get a better bias current.

For the buffer after the low impedance divider one would prefer less voltage noise and current noise and bias are less relevant. Here the max44251 may be suitable but possibly overkill.
The buffers directly at the ADC may also be non AZ types, when an additional layer of switching (could also choose divider ratios) is used.

[David Hess]

I was thinking about how to correct the drift and 1/f noise of a bootstrapped OPA140, or any other low input bias current part.  I wonder if a discrete chopper design is feasible using photo-FETs.  The H11F1 series is what comes up now if you do a search however I thought I remembered higher performance 3N parts with better leakage.  The datasheets for the H11F1 series only list worst case values so it is not clear how well they really perform.

Here one needs some compromise and the AD8628 is about at a suitable point for a normal DMM  ( ~ 22 nV/sqrt(Hz) , ~ 40 fA/sqrt(Hz) and some 10 pA range input bias).

When you write "normal DMM", do you mean like 4-1/2 digits or non-electrometer input?

4-1/2 digit DMMs can easily get by without chopper or even automatic zero.

[Echo88]

You can use PhotoFETs for chopping or Autozero, but their switching times are typically in the µs-region.
H11F1 produce considerable offset voltage, see the document attached in https://www.eevblog.com/forum/metrology/measurements-of-leakage-current-and-offset-voltage-on-some-optofets-and-relays/ "A BILATERAL ANALOG FET OPTOCOUPLER.pdf"Figure 8
Leakage of generic PhotoFETs like AQW210S or similar can by suitably low, check my measurements in the document "OptoFETs realigned.xlsx".
The document also contains H11F1 offset voltage measurements.

[Kleinstein]

I was thinking about how to correct the drift and 1/f noise of a bootstrapped OPA140, or any other low input bias current part.  I wonder if a discrete chopper design is feasible using photo-FETs.  The H11F1 series is what comes up now if you do a search however I thought I remembered higher performance 3N parts with better leakage.  The datasheets for the H11F1 series only list worst case values so it is not clear how well they really perform.

Here one needs some compromise and the AD8628 is about at a suitable point for a normal DMM  ( ~ 22 nV/sqrt(Hz) , ~ 40 fA/sqrt(Hz) and some 10 pA range input bias).

When you write "normal DMM", do you mean like 4-1/2 digits or non-electrometer input?

4-1/2 digit DMMs can easily get by without chopper or even automatic zero.

With normal I meant not an electrometer input for very high source impedance and also not a nV meter for very low noise and thus also low (e.g. < 1 K) source impedance.
Noise wise an amplifier gets the best noise figure it the source impedance is equat to the ratio of voltage noise to current noise. For the AD8628 this is at some 500 K, the LCT2057 at some 70 K and the max44251 or ADA4522 is more suiteable for some 10 K.
The other point is having a input bias in the < 50 pA range, but no need to aim for < 1 - 5 pA as with electrometer inputs.

Attached is a graph from the Keithley Low level measurement Handboock, that shows the destiction.

[Echo88]

While were at it: Like iMo pointed out the 8588A indeed seems to only have 10M and 1M input impedance. No >=10G as is standard for >= 6.5 Digit tabletop DMMs.
Are they trading performance for Zin or did they just cheap out on the analog frontend?
https://us.flukecal.com/literature/product-literature/specifications/8588a-product-specifications

[Kleinstein]

They have 1 M, 10 M and auto. Here auto is > 1Tohm up to 10 V range - see page 3.  Not sure which setting is standard, but I would expect auto.

[Echo88]

Ah indeed, doh. page 11. I was irritated by them also using "Auto" in the 100/1000V-range, where its suddenly meaning a different input resistance.

[iMo]

They have 1 M, 10 M and auto. Here auto is > 1Tohm up to 10 V range - see page 3.  Not sure which setting is standard, but I would expect auto.

When toggling between 1M, 10M, auto, I would select 10M.. What we did.. 
We do not read manuals..

In my first schematics V40 above I have there

OPA140->18k/2k divider->2xADA4528->ADC_diff_inputs

How to wire that exact config such I get the V44 (with the increased input range)?

[Kleinstein]

The current V44 version has 3 K 2K 3 K and gives a +-20 V FS range. Actual resistor should likely be a bit higher(e.g. 5 x)  to avoid to much thermal INL.

A more practical version could be 20 K 10 K and 20 K which could allow for a theoretical +-25 V range. This may need a little more than +-15 V supply though to really get all the way to the extremes.
One could get the resistors from 8 x 10 K  also split over 2 arrays (the 10 K in the center would be 2S2P for this).
The divider choice depends on the targeted use. Also a 15 V range or maybe a ADC ref of a little less than 5 V (e.g. 4 V) may make sense.
The inverter for the neg side may use a bit larger resistors or even also use the resistors from the signal divider with a center tap in the middle.
With the still relative small resistors the loading of the amplifier can be an issue to cause thermal INL.

The amplifier for the input also depends on the needs. Beside the OPA140 for very low bias, but some drift, also an AD8628 or similar could make sense if one wants an zero drift front end at the cost of higher bias.

[David Hess]

You can use PhotoFETs for chopping or Autozero, but their switching times are typically in the µs-region.
H11F1 produce considerable offset voltage, see the document attached in https://www.eevblog.com/forum/metrology/measurements-of-leakage-current-and-offset-voltage-on-some-optofets-and-relays/ "A BILATERAL ANALOG FET OPTOCOUPLER.pdf"Figure 8
Leakage of generic PhotoFETs like AQW210S or similar can by suitably low, check my measurements in the document "OptoFETs realigned.xlsx".
The document also contains H11F1 offset voltage measurements.

Thanks for the link.  That offset voltage is a killer and 100 times greater than I expected.  So much for that idea.

The alternative might be 3N, SD, or JFET devices with external isolated drive to reduce charge injection.

[Kleinstein]

AFAIR the Keithley 2182 nV meter uses  pairs of 2N7000 FETs and photovoltaic drive for switching. This looks tempting but there is still a chance to get charge injection switching spikes. Compared to a Photomos switch this allows to separate the LED in the coupler as a heat source from the FETs.
The ready made photomos switches may still be good enough - I have not seen much offset and the HP34420 nV meter uses some in the signal path. So at least some types seem to be OK when it comes to parasitic thermal EMF. The separate build version is not necessay better if the layout is not good. I got a few µV ( AFAIR some -1 µV and + 4µV)  of thermal offset for that type of circuit.

[David Hess]

The ready made photomos switches may still be good enough - I have not seen much offset and the HP34420 nV meter uses some in the signal path. So at least some types seem to be OK when it comes to parasitic thermal EMF. The separate build version is not necessay better if the layout is not good. I got a few µV ( AFAIR some -1 µV and + 4µV)  of thermal offset for that type of circuit.

Given the magnitude of 100s of microvolts, there is more to it than thermal EMF.  I suspect exposure of any junction isolation is allowing the photoelectric effect.

AFAIR the Keithley 2182 nV meter uses  pairs of 2N7000 FETs and photovoltaic drive for switching. This looks tempting but there is still a chance to get charge injection switching spikes. Compared to a Photomos switch this allows to separate the LED in the coupler as a heat source from the FETs.

Some electrostatic shielding should go a long way.

I would like to try it with pulse transformers but that makes avoiding charge injection even more difficult.

[Echo88]

Jep, afair the big voltage offset with the H11Fx indeed also seemed to me like its related to photoeffects instead of TEMF.
If i understand it correctly controlling a JFET/MOSFET via isolated source or not is irrelevant. The changing gate voltage produced by the internal solarcell should produce a charge injection effect via its Cgd.
Dont share my opinion? Conduct a lobotomy on a PhotoFET by carefully drilling a hole into its side till you hit the brain...err transparent jelly that encloses the LED-solarcell combination inside the Epoxy case and stick a lightpipe into it to control the PhotoFET via external light source. I have such a guinea pig laying around on my table but havent dont any charge injection tests with it.

Normal MOSFET based PhotoFETs like PVA/AQV/AQW can produce very low offset voltage, at least thats what i measured:
PVAxxxx OptoFET at 1mA LED Drivecurrent: low TEMF ~25nV
PVAxxxx OptoFET at 2mA LED Drivecurrent: low TEMF ~50nV

[iMo]

Now imagine this rather extreme  spec for the AFE (and the ADC):

a. 10Meg input only
b. only positive input voltages - from 1.0V to 15V DC - in one single range
c. 7.5+digits resolution at 100-1000NPLC
d. AZ_opamp_input_buffer->low_imp_divider->ADC_buffer(?)
e. Gain Calibration switch at the input_buffer's input.

I think this covers 98% of activities people in this section actually do - they want to measure/check their references (1V/2.5V/5V/7V/10V/14V) from time to time.

No need to try to copy the high_end gear with all their specialties (rather a nonsense, imho)..
No need to go to <1000mV levels/ranges - no null meter requirement..
No need to measure negative voltages..
No need to have >10G input impedance..
No need to digitize fast AC signals..

How this spec would affect (or simplify) the design of the AFE, provided the ADC is the differential ADC (like the 7177, 1263, 2500-32)??

[Kleinstein]

The AD7177 can give 7.5 digit resolution already with some 1-4 PLC. With very good resolution a single range can go a long way. Noise wise one could still be comparable to a lower end 6 digit meter (K2000 or 34401) in the 100 mV range. To some degree overkill at the ADC can save on extra ranges, though this would than be more a 6 digit meter (also with a less accurate reference) using SW scaling for the lower ranges.

Going only 1 range simplifies things, especially in the system with the driven low side for a differential ADC (e.g. AD7177). So the configuration with a 3 resistor divider and driven low side (e.g. the V44 version). The range is naturally for both polarities. It is still not too bad (some not so critical CMOS switching, like a DG409)  to add a range (e.g. 5 V or a little less) with no extra attenuation and thus better stability. This may than look a little like the front end of the Sigilent SDM3065.  A point that can be a bit tricky is a way to measure the own reference and thus way check the ADC gain, reference divider and range setting divider. This part may need extra effort, like a charge pump stage.

There is no need to go for a 10 M only input - this makes not much sense and would be a serious limitation. At least for not so high voltages it is a simple relay to connect a 10 M higher voltage divider or not.
It would be more to skip the 10 M input impedance option and be high impedance only. At least the 100 Gohm range should be easy to reach.

[MasterT]

External AZ OPA, even the good one like max44251  (I'd think about crappy AD8628 as a joke),  configured as G=1 buffer has a few MHz bandwidth. There is no way to limit this band with G=1, so accumulated noise  jump up in x1000, and excellent 5.9 nV /sqrt(Hz) becomes 6 uV-RMS, or 36 (!!!) uVp-p. Now compare to about 50 nVp-p that internal buffer has.

The point with high input impedance is for the buffer before the divider - the 2nd buffer (may be 2 for pos and neg input) is a different thing. For the input side the max44251 or OPA189 are more like a poor choice for a more conventional DMM, as they have too much current noise (e.g. 600 fA/sqrt(Hz) for the max44251) and input bias. Here one needs some compromise and the AD8628 is about at a suitable point for a normal DMM  ( ~ 22 nV/sqrt(Hz) , ~ 40 fA/sqrt(Hz) and some 10 pA range input bias).

  Current noise is not relevant, since we are talking about DC application. Setting 0.1uF between input and ground reduce BW (bandwidth) to to sub-Hz.  Voltage noise,  has 1-10 MHz BW.

 Don't bother to replay, I'd keep my ignored list updated.

[David Hess]

If i understand it correctly controlling a JFET/MOSFET via isolated source or not is irrelevant. The changing gate voltage produced by the internal solarcell should produce a charge injection effect via its Cgd.

There is still common mode electrostatic coupling, hence my comment about electrostatic shielding.  Optocouplers often include electrostatic shielding, but not all of them.

I was thinking that for a magnetically driven FET, a center tap on the secondary of the pulse transformer could be driven by a guard to reduce electrostatic coupling by removing any common mode variation.  Tektronix did something like this in some of their 7000 series plug-ins for sample-and-hold amplifiers but without the center tap because they did not need that level of precision.

Normal MOSFET based PhotoFETs like PVA/AQV/AQW can produce very low offset voltage, at least thats what i measured:
PVAxxxx OptoFET at 1mA LED Drivecurrent: low TEMF ~25nV
PVAxxxx OptoFET at 2mA LED Drivecurrent: low TEMF ~50nV

Yes, but those are not available so might as well not exist.  At least I have not found these parts that you are referring to, and if they are SSRs, then I can do better with my own design.

a. 10Meg input only
d. AZ_opamp_input_buffer->low_imp_divider->ADC_buffer(?)

My own experience is that those two requirements are contradictory because of excessive input bias current, input current noise, and charge injection, but maybe modern parts allow it.

[Kleinstein]

Some of the modern AZ OP-amps are OK for a high impedance buffer. They still need some filtering with maybe a few 100 pF to ground. This would usually not be the super low voltage noise types (OPA189,AD4522 or similar), but more intermediate types like AD8628, LMP2011, MCP6V76 or OPA387 with often acceptable bias and current noise. Worst case one may have to select for low enough a bias.
They won't be ideal for 10 M source impedance, but still not terrible and the relevant impedances for a DMM are more like < 100 Kohm, and for a meter with only 10 M input resistance more like < 1 K anyway.
One usually does not care what an open voltmeter input reads and how noisy it is under this condition.
If really needed one could offer multiple inputs for different source impedance ranges, including an electrometer grade input and maybe one for low noise (more nV meter like) on the smaller votlage range.


The switching with optical driven MOSFETs is an interesting option mainly for higher voltages (e.g. up to 1000 V with some types). Usually they have 2 back to back FETs in series and if they don't switch at the same level one can still expect quite some charge injection pulse even with isolated drive. So I don't see them as a great option for the AZ switching at the input. This is more like a solid state relay replacement and maybe part of the protection.

For low glitch switching I would suggest using a pre-charge phase with bootstrapped switches. This part only switches between the actual input and a low bias buffered input signal. So the switch works at essentilly zero voltage across the switch and with fixed CM level to allow a fixed trim of the charge spikes. They can thus use a relative small gate signal (e.g. -5 V for JFETs or 3-5 V supply CMOS switches). Actual switching between the input (or buffer signal) and zero is than a 2nd set of switches, e.g. together with an input multiplexer. While switching here the actual input is isolated.
Normally there are only 2 or maybe 3 critical inputs that would really need the pre-charge part. So the extra effort for a separate pre-charge part per critical input is not that large.

The switching scheme of meters like the HP3456 or 3458 are more like input mux and than precharge switching as a 2nd step, so the other way around. This way they need the precharge part only once, but requires the compensation of the gate charge for a variable voltage and with higher voltage switches. This gets tricky as the gate capacitance is nonlinear. So the compensation can only be approximate, or needs a voltage dependent correction. This may be the reason the the rather complicated DAC part to trim the charge compensation in the HP3458 - could still be just a fixed trim.

[Echo88]

@David: The PVAxxxx refer to the many variants i tested in the "OptoFETs realigned.xlsx", for example PVA1052/PVA1054/PVA3054 etc. Many are obsolete as marked in the table, but there are also nice ones like CPC1017N or AQW210S.
Yes, apart from the H11Fx (H11F1/H11F2/H11F3) all OptoFETs/PhotoFETs or whatever they are called are optically controlled MOSFETs/SSRs.