I have also couple other stupid questions:
I see the analog opamps in there (AD867x) have 12uV Vos. What is the specific reason for using these, instead of a chopper amp, that should have much less drift and offset? Is the 1/f corner noise the issue or what? I am certainly no precision instrumentation designer, so trying to figure out.
Would be interesting to see if a less-precise version with LM399 could be made similar way, with cheaper components. (I happen to have couple of those references ) and already thought about making a portable calibrator, but with high voltage output capability (with HV amp on the output).
QuoteOh nice.
Not too complicated and in a nice box.Thanks jbb!QuoteI have a couple of questions / comments:Quote
- What's the main power supply? Mains frequency transformer? (Sorry if you already said...)
For analog circuits pure linear supply with toroid transformer and LM317 being used. VFD and CPU have a switched mode 5V supply.Quote
- You've got a few precision resistor stages in there (7V->10V, 10V->-10V, output amp). Would it make sense to use a +-7V reference for the DAC to avoid one set?
Good question! My first idea was just a source with +/-10V, afterwards I came up with that it would be nice with generating ACV up to 10V, and there I needed amplification. So it is kind of optimized +/-10VDC or 7VAC. But you are right! Might be a good idea to use the 7V from LTZ1000 as reference and only have ONE amplification stage after D/A to get full +/- 14.142VQuote
- The AC output seems to have some glitches on DAC update. Are these glitches in line with the DAC spec, or is it something else? (e.g. opamp slew, ringing in DAC or opamp supply rail ferrites+capacitors)
What I found is that the ringing is coming from the LT1010 buffer stage, got improved when I put the bias resistor of 47 on LT1010. But it can certainly be improved more! Hopefully the analog gurus on this forum have some ideas!Quote
- The proposed 14V output buffer (LT1010) might clip against +15V rail. You should check for dropout specification, and have a look at supply rail tolerances
Sorry! Did not update schematics, but indeed you are right, I am using +/-16.2V supply to overcome the dropout in the OP´s...Quote
- Maybe - maybe - consider separate regulators for the output buffer. That way the external load current won't perturb the internal supply rails.
Good idea, might improve things!QuoteI'm not sure how important AC generation is to you, but I have some thoughts:Quite important, I already have accurate DC sources, but none for ACV for calibration of DMM´s etc. Function generators usually don´t have accurate and stable amplitude (at least not the ones I have tried).Quote
- Looks like some filtering is required :-)
Yes, indeed! I am just worried about how much the filtering would affect amplitude accuracy, but will certainly try it!Quote
- For spectral purity, you want very good timing of the DAC update. At present, I guess that timing comes from the SPI transfer. If the SPI transfer is started by software, you could get jitter. Driving the LDAC pin from micro controller timer output (via isolator) could be a very effective way to tighten that up.
Yepp, you are right, I do have some jitter! Now DAC update LDAC automatically after getting 24 bits on SPI. There is one extra channel left in the galvanic isolator and test points available, so easy to add it. I also think this would certainly improve things to load DAC data, and at precise intervals pull LDAC low. First i tried interrupts, but since I wanted to generate as high frequency as possible, I wanted interrupts very often, but every call to interrupt routine is using many machine cycles making it slow. So now I just use a stupid delay in main-loop...Quote
- At lower output frequencies you should be able to do >>128 samples per period. In fact, I think you want to, so that the noise inherent in the sampled sine wave is pushed up to a higher frequency and easier to filter out.
Some kind of Direct Digital Synthesis (DDS) might be good here: you can get adjustable frequency with fixed update rate.I knew there are lots of DDS chips available with precise frequency but not that accurate amplitude, but I might use some DDS principles in the SW? Hmmm, wish I was a better programmer...
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QuoteAbsolutely lovely project. It's obvious you spent your time spit-and-polishing the thing.
What I really appreciate it's finished, working and documented project, being of rare occurrence here. Well done!Thanks Jaromir!QuoteI have some additional questions, to clear up some design particularities:
1, The most obvious one - did you measure the linearity and stability of your calibrator? I know this task is non-trivial, but still, design verification is part of the design. Also, it could be interesting to compare AD5791A and AD5791B.Unfortunately the best gear I have at home is FLUKE 8846A and Agilent 34410A. I really miss the gear at my previous work, I used our 3458A and FLUKE 5520A a lot for personal projects Not to mention calibration of all my dozens handheld FLUKE´s What I have noticed is that AD5791B indeed is more accurate (more linear) than AD5791A (not statistically enough samples of course...), I read somewhere on AD forum the chips undergo extensive trimming and very extensive testing. They after all guarantee all parameters including INL and DNL, I guess in lack of good gear we have to trust them!Quote2, Could you, please share internal view of the enclosure? For precision stuff, thermal design is quite critical, even for "low power" devices like multimeters or simple reference sources; when dealing with power stage it's even more prominent - that's why I'm curious.I attach pictures, it is rather compact inside! Luckily there was already a metal shield inside, perfect between A/D board and CPU board!Quote3, The enclosure looks really good - is that custom made enclosure or you repurposed existing one? Googling for "xflash max" logo visible on front panel didn't bring obvious results.I repurposed one box I had at home, made by German company Röntec, seems to have been some kind of advanced scientific equipment.Quote4, What connectors have you used for voltage output?Output is gold plated double binding post, and 2mm banana jacks for measuring VREF Positive and Negative (SW can be re-calibrated with new constants)Quote5, LT1010 does have 2,5-3V of saturation voltage at output current 150mA (both polarities), supplying it with +15V may not be enough to get +14V of output at 150mA. It should be fine at lower output currents. How does your prototype behave in this aspect?I use +/- 16.2V, so far I can get 10VAC out, have not loaded output that heavy yet, will try and see what happens!
Looking at your work, @Micke, is like admiring art at an exhibition! Thank you for sharing & inspiration.
QuoteThanks for clarification and some more pictures.
Also, I took a look at your sources and found similarity to my programming style. You decide whether it's praise or insultHaha, I take it as a praise! I know many things could have been done more elegant, for example configuration of D/A, instead of just putting value 0x200332 I tried a Union struct where LINCOMP, SDODIS, BIN_2sC etc. could be set more intuitive, but it did not work... And as jbb kindly pointed out, there are things to sort out to reduce the jitter... would be nice to have a "real" programmer that knew the MCU inside out for these accurate timing things!QuoteWhen testing the load regulation, apart from short test you may want to try power dissipation/temperature stability test. Set output to something like 10V, so you have a lot of headroom from 16,2V. Load it with maximal current and log the output voltage (HP34410 should be OK for this test). I guess you may expect two processes to happen - first is fast voltage sag, caused by uncompensated internal resistance of your circuit (ground lead) or voltage drops on PCB traces. Notice that at 10V and 150mA, every 66 microOhms of path resistance will cause 1ppm error. 10cm of 1mm diameter (approx. 0,8mm cross-section, 18AWG) copper wire has resistance roughly 2mOhms.
That is the part that is somehow easier to remedy by having two separate force and two differential sense terminals. On the other hand, the heat dissipated (from linear output stage of LT1010 plus losses in power supply) will also warm up your circuit and possibly cause voltage drift (drifting resistors in voltage dividers, reference or offset voltage of opamps, thermal EMF). This may take minutes to hours to stabilize. You may also insert temperature probe inside and calculate the temperature coefficient. At this point, one may be tempted to do temperature compensation, but it may be tricky thing to do properly.
I don't know how much of a drift you'll observe, perhaps this is non-issue, but I think it's interesting experiment to do with tools you have on hand.
Fortunately, usually one don't need much of a current from a voltage calibrator, so this may be not a problem for usual mode of operation, though useful to know.To mitigate voltage drop, I put +sense directly on binding post, and put 1,5mm² cable directly from ground binding post to the power supply, not to get voltage drop on the PCB on ground traces. . The optimal solution would be as you say to have sense wires also on - line as well. But I will do as you suggest, heavy loading and log during duration of hours. At my current work place I can borrow a Keysight 34465A, I love the trend display and histogram of this meter! But as you say, normally you don´t have much load on a reference, but good to have the current capability if needed (and take into account the offset error due to loading...)
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Yepp, you are right, I do have some jitter! Now DAC update LDAC automatically after getting 24 bits on SPI. There is one extra channel left in the galvanic isolator and test points available, so easy to add it. I also think this would certainly improve things to load DAC data, and at precise intervals pull LDAC low. First i tried interrupts, but since I wanted to generate as high frequency as possible, I wanted interrupts very often, but every call to interrupt routine is using many machine cycles making it slow. So now I just use a stupid delay in main-loop...
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Using the DDS principle (fixed sampling frequency and calculating the phase in steps) can give fine control over the frequency, but it can also effect the amplitude stability. For higher frequencies one would still need filtering. So for a calibrator the way with fixed table with an integer number of points per period and repeating the table is probably better. The 128 samples sound like a reasonable compromise, though 64 or 30 points could still be OK if higher frequencies are more important.
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You've got a few precision resistor stages in there (7V->10V, 10V->-10V, output amp). Would it make sense to use a +-7V reference for the DAC to avoid one set?
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You've got a few precision resistor stages in there (7V->10V, 10V->-10V, output amp). Would it make sense to use a +-7V reference for the DAC to avoid one set?
...On second thought, this might not help as much as one would like, because there is still the matter of providing stable Zener (and temperature sensor / buffer transistor?) drive currents, so benefits may not be as much as one would hope. I'm absolutely not an expert here...
It seems to me like you can at least relax a bit on absolute resistor ratios as long as they are stable. Stable gain errors can be calibrated out.
QuoteAnyway the boards are beautiful made, so why redo it just to save a few parts.Thanks Kleinstein!QuoteWith just 2 terminal output there will always be some sag if there is hea :-//vy load. So the heavy load case can not expect the highest accuracy, but it can still be useful if just a low noise source is needed. In this sense one may even consider to optionally enable some filtering (switch in a capacitor for C33) to choose between low noise and high accuracy for the AC part.Yep, did not plan to load output that heavy, and if I do, I will adjust the voltage accordingly to compensate. Yes, C33 was prepared as you say to be able to do some filtering Will do some experiments and see how much the amplitude is affected, might be possible to enter an offset (one per frequency range) to compensate.QuoteFor the output stage it may help to add some constant current load to the output of U6, so that it's output stage is in class A mode and avoids cross over on transients. This may help a little with the ringing, so that at least the ringing would change less with direction and step size. With the LT1010 as power stage a much faster OP would be problematic.Ahh, sounds reasonable! Thanks for advice, I will put some small loading (like 10k) on U6 output, and see if the ringing gets smaller! Ahh, it gets worse with faster U6? I thought it settled faster with faster OP and thereby less ringing...
Erm, before going to town on the output buffer stage, have you checked the VOUT_DAC waveform? The buffer stage might be carefully amplifying a real signal...