Saturated Standard Cell Amplifier in LT1008/LT1012 etc.

[ksilabs]

I'm going to make a Voltage Reference based on SATURATED standard cells -- have a couple of TRANSVOLT 9154D boxes with 4 saturated standard cells in Dewars, all 8 cells are still alive and have proper EMF. I'm going to redo the heating -- have proper calibrated tools to measure (and set) temperature to 0.001 degrees Celsius (or Kelvin ) so the EMF can be calculated and it is supposed to give an absolute value to be used as a PRIMARY standard.

I want to BUFFER/amplify the cells' EMF with LT1012A opamps and looking into their datasheets makes me scratch my head.

They have the "Saturated Standard Cell Amplifier" example in several of their datasheets (LT1008, LT1012 and some others) that uses their beloved 2N3609 FET to disconnect the cell when the thing is powered off. It is a verbatim copy in ALL of them and I can't understand how they thought it should work.

The 2N3609 is a dual P-CHANNEL FET with substrate pin and unprotected gate. The closest replacement is [also unobtanium] MFE3020 but it doesn't need to be a DUAL so 3N163/164 can be used as a replacement. Those were resurrected by Linear Systems and readily available from major distributors. I'm going to keep the buffers/amplifiers OFF most of the time, only powering them ON couple of days before using that Frankenstein for calibration and then power them off thus keeping the cells disconnected most of the time.

The problem is it is NOT going to work as shown. It is a P-CHANNEL FET so applying a POSITIVE potential to its gate will NOT make it conduct. As shown, it requires a comparable N-CHANNEL FET but there is nothing comparable to those 3N163s in N-Channel. Linear Systems has 3N170/171 that are closest to 3N163 in N-Channel but those have 50 times the 3N163 drain-source leakage in OFF state (10nA vs 200pA) and their threshold voltage might be too low. Nothing else like that is available anymore even if it existed back in the dark ages.

Does anybody know what they thought when they included that very same example in their multiple datasheets?

BTW, NSC also have an example of a Saturated Standard Cell Amplifier in their LM11 datasheet but that one is significantly different although they used the same 2N3609 FET (they use two of them so dual makes sense there). However, they used it PROPERLY -- substrate to positive rail, gate to negative, and the cell's NEGATIVE lead is switched by the 2N3609 channel.

[picburner]

A shop still seems to carry this unobtanium MOSFET, which also has the exact same designation as a current PNP transistor, which leads to confusion. Edit: I created the confusion myself, but the link is correct.
But to avoid the MOSFET problem, couldn't you use a high-quality dual switch with one section isolating the buffer power supply and the other isolating the cell?

[ksilabs]

A shop still seems to carry this unobtanium MOSFET, which also has the exact same designation as a current PNP transistor, which leads to confusion. Edit: I created the confusion myself, but the link is correct.
But to avoid the MOSFET problem, couldn't you use a high-quality dual switch with one section isolating the buffer power supply and the other isolating the cell?

Ah, that's in Germany, unknown if they have more than one (I have 8 cells), so no reason to even try...

As of a switch, it is additional thermocouples, not very convenient to have 8 switches or even one 8-sections switch, and who will be that tiny boy who would switch it off the moment of a sudden power loss? And don't lull yourself that it is not going to happen, that there are batteries etc. Remember, Murphy never sleeps and it is very easy to kill a saturated cell... There are no replacements and they require something like half-year at least to fully stabilize.

I can also put the entire buffer inside the oven but not a switch.

[picburner]

As of a switch, it is additional thermocouples, not very convenient to have 8 switches or even one 8-sections switch, and who will be that tiny boy who would switch it off the moment of a sudden power loss? And don't lull yourself that it is not going to happen, that there are batteries etc. Remember, Murphy never sleeps and it is very easy to kill a saturated cell... There are no replacements and they require something like half-year at least to fully stabilize.

I can also put the entire buffer inside the oven but not a switch.

As for the thermocouple effect, perhaps there are ways to mitigate it (a rotary switch, placing the critical section in the oven and controlled via a long rod), but I hadn't considered Murphy's Law: a sudden voltage drop.

Anyway, the shop has #12 2N3609.

[David Hess]

Bob Pease showed the same configuration.

I could not find any datasheet for the 2N3609 MOSFET, so I am not clear about what type it is.  I am not confident that there was not a drafting error in the schematic.

But to avoid the MOSFET problem, couldn't you use a high-quality dual switch with one section isolating the buffer power supply and the other isolating the cell?

Even a momentary overload will require time for the standard cell to recover.

[TimFox]

Coto makes reed relays with internal thermal-EMF compensation:
https://cototechnology.com/product/3600-series-low-thermal-emf-reed-relays/

[ksilabs]

Bob Pease showed the same configuration.

I could not find any datasheet for the 2N3609 MOSFET, so I am not clear about what type it is.  I am not confident that there was not a drafting error in the schematic.

But to avoid the MOSFET problem, couldn't you use a high-quality dual switch with one section isolating the buffer power supply and the other isolating the cell?

Even a momentary overload will require time for the standard cell to recover.

That is a RIGHT schematic, of LM11. Here the 2N3609 FET is used correctly, substrate to positive, gate to negative. This is a schematic from the LT1012 datasheet that is plain wrong -- they apply POSITIVE voltage to the 2N3609 gate. This very same schematic is in many Linear Technology datasheets (LT1008 etc).

There is no datasheet for 2N3609 FET but it is in Motorola databooks in "Motorola replacement" tables and it shows MFE3020 as a direct replacement. The MFE3020 is a P-CHANNEL dual FET with unprotected gate. The other replacement is a SINGLE 3N164 (3N163 is better) P-CHANNEL FET with unprotected gate.

Dunno why, but that 2N3609 is used universally in all examples of Standard Cell buffers, from different manufacturers. It is clearly a P-Channel FET in all equivalent tables (there are several available and don't forget the old treasure, D.A.T.A. books that also show it as P-Channel). It is drawn as P-Channel on all those schematics and properly used in LM11 implementation on the pages attached to the previous message.

[Alex Nikitin]

You mean this is the right schematics from LM11 data sheet .

Cheers

Alex

[ksilabs]

You mean this is the right schematics from LM11 data sheet .

Cheers

Alex

I don't mean it is RIGHT. I only mean that P-Channel FET is connected properly there.

[David Hess]

The drafting symbol is still wrong for an enhancement mode MOSFET.

[ksilabs]

The drafting symbol is still wrong for an enhancement mode MOSFET.

Yep, the channel is NOT broken so it is a symbol for a DEPLETION mode MOSFET. But it is just a drafting symbol that is wrong, otherwise it is OK.

[floobydust]

I looked and 2N3609 is a very early dual P-ch. enhancement-mode MOSFET, circa 1967. When it was called "insulated gate FET". Philco-Ford Microelectronics Division and then General Microelectronics, so not much data on it.
It's main claim to fame is very low leakage current, but importantly it does not have ESD protection diodes to achieve that.

I suspect Bob Pease had it lying around as one of those neat samples. It's just acting as a high-side switch? You don't need a dual, as one just switches the LED.

A competitor was General Instruments MEM551 or MEM955 GI 1977 Databook big pdf
MEM955 pg. 199
I_DSS 80pA typ., 1nA max. V_SD -20V
I_GSS 0.02pA typ., 2pA max. V_GS -40V

MEM551 pg. 197
I_DSS 0.2pA typ., 10pA max. V_SD -20V
I_GSS 1pA max. V_GS -15V

I haven't seen modern parts that can achieve this, either they have integral gate-protection diodes or they are power MOSFETS good for high currents.

This thread did not bear fruit https://www.eevblog.com/forum/projects/looking-for-very-low-guaranteed-idsslt100na-p-channel-mosfet/

edit: maybe PV MOSFET SSR's are contenders?
Vishay SSR's like VOR2121 1nA but back-back MOSFET's and I imagine there is some contact potential.
OMRON low leakage SSR G3VM-21MT 1pA "Current leakage when the main line is open and sub line is close =1 pA (Maximum) at VOFF =20 V" {no idea what they are talking about lol}
- added MEMs datsheet clipping

[picburner]

I think I've found the error in the LT1008/1012 schematics: the MOSFET gate should be connected to the negative supply terminal of the LT1012, not the positive terminal.
This is how it works, at least according to LTSpice.
However, even with the MOSFET in the OFF state, a small leakage current still flows (on the order of a few pA to tens of pA, depending on temperature), so the cell with that circuit will always be under load.

[ksilabs]

I looked and 2N3609 is a very early dual P-ch. enhancement-mode MOSFET, circa 1967. When it was called "insulated gate FET". Philco-Ford Microelectronics Division and then General Microelectronics, so not much data on it.
It's main claim to fame is very low leakage current, but importantly it does not have ESD protection diodes to achieve that.

I suspect Bob Pease had it lying around as one of those neat samples. It's just acting as a high-side switch? You don't need a dual, as one just switches the LED.

A competitor was General Instruments MEM551 or MEM955 GI 1977 Databook big pdf
MEM955 pg. 199
I_DSS 80pA typ., 1nA max. V_SD -20V
I_GSS 0.02pA typ., 2pA max. V_GS -40V

MEM551 pg. 197
I_DSS 0.2pA typ., 10pA max. V_SD -20V
I_GSS 1pA max. V_GS -15V

I haven't seen modern parts that can achieve this, either they have integral gate-protection diodes or they are power MOSFETS good for high currents.

This thread did not bear fruit https://www.eevblog.com/forum/projects/looking-for-very-low-guaranteed-idsslt100na-p-channel-mosfet/

edit: maybe PV MOSFET SSR's are contenders?
Vishay SSR's like VOR2121 1nA but back-back MOSFET's and I imagine there is some contact potential.
OMRON low leakage SSR G3VM-21MT 1pA "Current leakage when the main line is open and sub line is close =1 pA (Maximum) at VOFF =20 V" {no idea what they are talking about lol}

3N164 seem to be close enough. 3N163 is even better. They have unprotected gates. Very old Soviet _MILITARY GRADE_ 2P301 (not commercial grade KP301) was also close and had an unprotected gate too.

[ksilabs]

I think I've found the error in the LT1008/1012 schematics: the MOSFET gate should be connected to the negative supply terminal of the LT1012, not the positive terminal.
This is how it works, at least according to LTSpice.
However, even with the MOSFET in the OFF state, a small leakage current still flows (on the order of a few pA to tens of pA, depending on temperature), so the cell with that circuit will always be under load.

Sure, there still will be several pA of leakage but that is not all THAT horrible. And then, a good reed relay can be used to disconnect it for good while keeping the FET for protection.

[David Hess]

I think I've found the error in the LT1008/1012 schematics: the MOSFET gate should be connected to the negative supply terminal of the LT1012, not the positive terminal.
This is how it works, at least according to LTSpice.
However, even with the MOSFET in the OFF state, a small leakage current still flows (on the order of a few pA to tens of pA, depending on temperature), so the cell with that circuit will always be under load.

The threshold voltage of a 3N163 is from -2 to -5 volts, so at best it is a very high resistance and the output will include noise and offset from the input bias current.

[ksilabs]

I think I've found the error in the LT1008/1012 schematics: the MOSFET gate should be connected to the negative supply terminal of the LT1012, not the positive terminal.
This is how it works, at least according to LTSpice.
However, even with the MOSFET in the OFF state, a small leakage current still flows (on the order of a few pA to tens of pA, depending on temperature), so the cell with that circuit will always be under load.

The threshold voltage of a 3N163 is from -2 to -5 volts, so at best it is a very high resistance and the output will include noise and offset from the input bias current.

Ah, it is worse than that -- the LT1012 solution is BAD, even if the gate is connected to the negative power rail.

The problem here is that a threshold is NOT a point where the FET _STARTS_ conducting. It is merely a voltage where the drain current falls to some arbitrary value. In other words, the current through the FET channels does NOT stop at that threshold voltage. It still flows in sub-theshold region.

The big gorilla in the room is the standard cell itself -- when the thing is powered down, the gate is assumed to go to the ground potential. However, the standard cell itself biases the substrate to POSITIVE ~1V thus making gate potential ~1V into ENHANCEMENT direction. That is different in the case of LM11 schematic as both substrate and gate are assumed to be shorted and the standard cell biases the channel to ~1V NEGATIVE wrt the substrate which is a proper solution. It is NOT OK to tie the substrate to the channel in this case as it is done in LT1012 example. It is done right in LM11 example -- the substrate and the gate are shorted and the cell biases the channel NEGATIVE to them. LT1012 example is a total flop.

As of -2 to -5V threshold for 3N163 it is not a big deal -- for a mad dog, seven miles is not a long detour -- one can select the highest threshold parts from a bucketful of them... It is NOT something that should work with a worst case part in mass production, so preselected parts are OK here.

[David Hess]

The problem here is that a threshold is NOT a point where the FET _STARTS_ conducting. It is merely a voltage where the drain current falls to some arbitrary value. In other words, the current through the FET channels does NOT stop at that threshold voltage. It still flows in sub-theshold region.

The formal definition of the threshold voltage is the extrapolated intercept from the square-law region to the Vgs axis, which is higher than the commonly specified threshold voltage in the subthreshold region.  This is difficult to measure, so manufacturers pick an arbitrary drain current below this point.

With the Bob Pease version, he mentions the problem of subthreshold conduction for this application which is why I included both pages.

[ksilabs]

The problem here is that a threshold is NOT a point where the FET _STARTS_ conducting. It is merely a voltage where the drain current falls to some arbitrary value. In other words, the current through the FET channels does NOT stop at that threshold voltage. It still flows in sub-theshold region.

The formal definition of the threshold voltage is the extrapolated intercept from the square-law region to the Vgs axis, which is higher than the commonly specified threshold voltage in the subthreshold region.  This is difficult to measure, so manufacturers pick an arbitrary drain current below this point.

With the Bob Pease version, he mentions the problem of subthreshold conduction for this application which is why I included both pages.

Those are different MOSFETs and their characteristics are totally different.

That 3609, MFE3020, 3N163, soviet 2P301 are all early LATERAL FETs without intrinsic diodes or any protection. It is THOSE FETs that were killed by a mere sneeze within 10 yards from them. They all have a separate substrate leads that are NOT connected to anything else so you can apply voltage between substrate and the gate while have the channel floating somewhere in between. Nowadays ALL FETs have the substrate connected to their source that makes them totally different beasts. And they are not just flat on the die surface, lateral, anymore...

[magic]

The big gorilla in the room is the standard cell itself -- when the thing is powered down, the gate is assumed to go to the ground potential. However, the standard cell itself biases the substrate to POSITIVE ~1V thus making gate potential ~1V into ENHANCEMENT direction. That is different in the case of LM11 schematic as both substrate and gate are assumed to be shorted and the standard cell biases the channel to ~1V NEGATIVE wrt the substrate which is a proper solution. It is NOT OK to tie the substrate to the channel in this case as it is done in LT1012 example. It is done right in LM11 example -- the substrate and the gate are shorted and the cell biases the channel NEGATIVE to them. LT1012 example is a total flop.

Sounds like you would be better off with N-ch, at least if positive supply to the LT1012 is desired.

Linear Systems has 3N170/171 that are closest to 3N163 in N-Channel but those have 50 times the 3N163 drain-source leakage in OFF state (10nA vs 200pA) and their threshold voltage might be too low. Nothing else like that is available anymore even if it existed back in the dark ages.

10nA sounds like "eff off, we're not gonna bother testing this for you". Have you tried measuring actual leakage of any random MOSFETs you have? Say, build a simplified mockup with an AA cell instead of the standard cell and a dead short to ground in place of the opamp, see how much current flows through the turned-off FET.

I have blown some 2N7000s, so I think they may still be making them without gate zeners. Won't matter if N-ch is used, body diode leakage is the only issue.

edit
The "short to ground" assumes that the opamp will be used in single-supply configuration. I think it may work OK with LT1012 (based on published internal schematic) and it reduces Vds which the FET needs to block to 1V. If you choose to use dual supplies then your worst case may possibly be "negative voltage on the IN+ pin", because I'm not sure how this chip behaves with only the negative supply connected and I think that Linear's application example in this case cannot be trusted.

[Alex Nikitin]

Protecting a standard cell is actually more involved than it looks. The cell must be disconnected safely before any unwanted load appears to it, including transients during a power-up and power down, an under voltage on the supply, an output overload of a buffer (if the buffer output is shorted to ground, the input protection diodes may conduct and kill the cell) and possibly more. And it must be connected only when the buffer is in a good linear state and present a high impedance load to the cell. The original circuit from the LM11 does (or at least appears that it does, only a proper test could tell) most of these things. I personally would probably go for a reed relay with a low thermal voltage, like these for example, probably in a differential configuration with a proper control circuit which would disconnect the cell at any sign of trouble and connect it when everything is good.

Cheers

Alex

[ksilabs]

Protecting a standard cell is actually more involved than it looks. The cell must be disconnected safely before any unwanted load appears to it, including transients during a power-up and power down, an under voltage on the supply, an output overload of a buffer (if the buffer output is shorted to ground, the input protection diodes may conduct and kill the cell) and possibly more. And it must be connected only when the buffer is in a good linear state and present a high impedance load to the cell. The original circuit from the LM11 does (or at least appears that it does, only a proper test could tell) most of these things. I personally would probably go for a reed relay with a low thermal voltage, like these for example, probably in a differential configuration with a proper control circuit which would disconnect the cell at any sign of trouble and connect it when everything is good.

Cheers

Alex

That is what I'm going to do, use low thermal reed relays combined with a FET protection akin to that of LM11 example. Going to use Coto relays, trust them more.

I wonder how that Linear Tech flop made it into their numerous datasheets and nobody noticed that it is totally bogus.

[ksilabs]

The big gorilla in the room is the standard cell itself -- when the thing is powered down, the gate is assumed to go to the ground potential. However, the standard cell itself biases the substrate to POSITIVE ~1V thus making gate potential ~1V into ENHANCEMENT direction. That is different in the case of LM11 schematic as both substrate and gate are assumed to be shorted and the standard cell biases the channel to ~1V NEGATIVE wrt the substrate which is a proper solution. It is NOT OK to tie the substrate to the channel in this case as it is done in LT1012 example. It is done right in LM11 example -- the substrate and the gate are shorted and the cell biases the channel NEGATIVE to them. LT1012 example is a total flop.

Sounds like you would be better off with N-ch, at least if positive supply to the LT1012 is desired.

Linear Systems has 3N170/171 that are closest to 3N163 in N-Channel but those have 50 times the 3N163 drain-source leakage in OFF state (10nA vs 200pA) and their threshold voltage might be too low. Nothing else like that is available anymore even if it existed back in the dark ages.

10nA sounds like "eff off, we're not gonna bother testing this for you". Have you tried measuring actual leakage of any random MOSFETs you have? Say, build a simplified mockup with an AA cell instead of the standard cell and a dead short to ground in place of the opamp, see how much current flows through the turned-off FET.

I have blown some 2N7000s, so I think they may still be making them without gate zeners. Won't matter if N-ch is used, body diode leakage is the only issue.

edit
The "short to ground" assumes that the opamp will be used in single-supply configuration. I think it may work OK with LT1012 (based on published internal schematic) and it reduces Vds which the FET needs to block to 1V. If you choose to use dual supplies then your worst case may possibly be "negative voltage on the IN+ pin", because I'm not sure how this chip behaves with only the negative supply connected and I think that Linear's application example in this case cannot be trusted.

There are NO suitable N-channel FETs, even from old exotic ones. As of "eff off, we're not gonna bother testing this for you", they DID bother to test their 3N163 and I don't see how this would be different for 2N170/171, especially for the same manufacturer and similar resurrected parts.

It looks like it is not a coincidence that all those low leakage unprotected FETs are P-Channel.

As of a body diode, it only materializes when the substrate is connected to the source as it is in 99.99% of all MOSFETs available. If a substrate is separate as it is in that .01% of devices still available, there are 2 diodes connected back-to-back from drain and source to the substrate. If you keep the substrate potential above the channel (for the P-Channel device, below for the N-Channel one) those diodes are back-biased and essentially non-existent. The channel in such MOSFETs is bidirectional -- it blocks and conducts in both directions depending on gate-substrate voltage.

[Alex Nikitin]

Going to use Coto relays, trust them more.

Coto low thermal relays need a lot more power, especially 5V ones (and are about 3-4 times the price of Pickering). I had a very good experience with Pickering relays and if you do a two-level switching (hit it with a full voltage for 20ms and than leave it on a half so the dissipation would be 1/4 of the full), a single contact 5V relay from 101 series (i.e. 101-1-A-5/2) with a 1600 Ohm coil will dissipate less than 5mW , considerably reducing thermal gradients. 

Cheers

Alex

[ksilabs]

Going to use Coto relays, trust them more.

Coto low thermal relays need a lot more power, especially 5V ones (and are about 3-4 times the price of Pickering). I had a very good experience with Pickering relays and if you do a two-level switching (hit it with a full voltage for 20ms and than leave it on a half so the dissipation would be 1/4 of the full), a single contact 5V relay from 101 series (i.e. 101-1-A-5/2) with a 1600 Ohm coil will dissipate less than 5mW , considerably reducing thermal gradients. 

Cheers

Alex

Maybe. But they are GB manufacturer, right? Will have to check if their products are available here in the US.