Author Topic: Assembler CH32V307x.  (Read 1747 times)

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Offline AVI-crakTopic starter

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Assembler CH32V307x.
« on: March 06, 2023, 10:40:13 pm »
Hello.
I'm a little mocking CH32V307VCT6. The C code works without problems, but I want a lower level - assembler. And here is a complete failure. All my ARM developments turned out to be useless.
First, I want to deal with the startup file startup_ch32v30x_D8C.s .
The line "NMI_Handler: 1: j 1b" and below is of interest - I have not seen such a syntax, and I do not understand the purpose of the line.

Code: [Select]
.....
    .weak   DMA2_Channel9_IRQHandler   /* DMA2 Channel 9 */
    .weak   DMA2_Channel10_IRQHandler  /* DMA2 Channel 10 */
    .weak   DMA2_Channel11_IRQHandler  /* DMA2 Channel 11 */

NMI_Handler:  1:  j 1b
HardFault_Handler:  1:  j 1b
Ecall_M_Mode_Handler:  1:  j 1b
Ecall_U_Mode_Handler:  1:  j 1b
Break_Point_Handler:  1:  j 1b
.....
 

Online langwadt

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Re: Assembler CH32V307x.
« Reply #1 on: March 06, 2023, 11:03:11 pm »
1 minute of google; "J" is jump, "1b" is 1 backwards, so it is an infinite loop
 

Offline brucehoult

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Re: Assembler CH32V307x.
« Reply #2 on: March 07, 2023, 01:29:30 am »
This is absolutely standard GNU assembler on any platform, including ARM. "1b" for the nearest label 1 in a backwards direction, "1f" for the nearest label 1 in a forwards direction.

And RISC-V uses "J" for the unconditional Jump instruction (short for JAL with return address discarded into register 0) vs ARM using B/BL for the same purpose (ARM originally of course could make any instruction conditional, so no distinction possible between conditional Branch and unconditional Jump).
« Last Edit: March 07, 2023, 01:31:15 am by brucehoult »
 

Offline AVI-crakTopic starter

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Re: Assembler CH32V307x.
« Reply #3 on: March 07, 2023, 08:38:25 am »
It is clear - these are traps for a stupid code, literally.
The standard GCC uses a more cunning thing - a name replacement. And this seems to me a more logical solution.
Code: [Select]
  .weak      NMI_Handler
  .thumb_set NMI_Handler,Default_Handler

  .weak      HardFault_Handler
  .thumb_set HardFault_Handler,Default_Handler
 

Offline brucehoult

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Re: Assembler CH32V307x.
« Reply #4 on: March 07, 2023, 09:05:41 am »
It is clear - these are traps for a stupid code, literally.
The standard GCC uses a more cunning thing - a name replacement. And this seems to me a more logical solution.
Code: [Select]
  .weak      NMI_Handler
  .thumb_set NMI_Handler,Default_Handler

  .weak      HardFault_Handler
  .thumb_set HardFault_Handler,Default_Handler

It's exactly the same. Look at the .weak definitions above.

The difference is that this code has a different default handler for each trap type, not just the same one for all. So if your chip locks up and you connect with a debugger you can see WHICH loop it is stuck in and therefore which kind of trap that can't happen actually did happen and you should add a handler for it.

At a cost of 2 bytes of code each.
 


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