Atmel SAM D21 reason for two output drive strengths?

[MLXXXp]

The Atmel SAM D21 microcontroller series has the capability to set an output pin to two different drive strengths, controlled by the DRVSTR bit for each pin. With a 3.3V supply, low drive specifies a maximum 2.5mA sink and 2mA source. High drive specifies 10mA sink and 7mA source.

Let me state that I'm aware that the I/O pins are grouped into clusters, with a maximum total source and sink current specified for each cluster. Unless it relates to the answer, assume that these limits will not be a factor.

In the absolute maximum ratings there are no maximum safe currents specified for the outputs.

If the circuitry that's attached to an output limits the current externally, why would I want to set for low drive instead of high drive?

If an output is shorted, will the current be safely limited internally? For instance, with low drive could you attach an LED directly between a pin and power or ground, without a dropping resistor, and have it safely be driven at around 2mA? Likewise, in high drive mode will current safely be limited to the specified higher values?

If the two drive strengths aren't intended to provide some kind of safe current limiting, the only other reason I can think of is to somehow affect slew rates, but I've found no mention in the datasheet about this.

[JoeN]

If an output is shorted, will the current be safely limited internally?

 

[radar_macgyver]

Drive strength will affect the way the I/O pins interact with transmission lines. If you're using the I/O lines at high speed, you'll have two different IBIS models that you can use when designing termination networks attached to the pins. Slower drive strength will imply lower amounts of ringing and crosstalk, at the expense of speed.

The DC currents are not limited by these settings. If you're driving an LED, for example, you will still need a dropper resistor. You'll also find that the LED brightness won't change regardless of the drive strength selected.

[MLXXXp]

Drive strength will affect the way the I/O pins interact with transmission lines.

So I was correct when I said:

the only other reason I can think of is to somehow affect slew rates

It's strange that the datasheet doesn't point this out, and doesn't specify a maximum safe current in the Absolute Maximum Ratings.

Thanks @radar_macgyver

[mubes]

If the two drive strengths aren't intended to provide some kind of safe current limiting, the only other reason I can think of is to somehow affect slew rates, but I've found no mention in the datasheet about this.

Indeed that is what its for.  The overly simplistic way I think of it is this; The drive strength defines the 'rate' at which electrons can be sourced (or sunk) through the pin.  Since the pin will always have some capacitance attached to it (in the order of a few pF for a simple track) then this defines how fast you can fill (or empty) the track...and hence the speed at which the voltage will change. A lot of electrons flowing has impacts in both EMC performance and supply rail behaviour and so, in general, if you can get away with a slow slew rate, then you do so.

DAVE