Book/Tutorial/Guide on creating a soft core processor

[BytesGuy]

Hi all,

Does anyone have a decent book/tutorial/guide for creating a soft core processor?

I am interested in developing a basic one to synthesise on my Spartan 3E so I have a good excuse to put my board to use

Thanks

[Sal Ammoniac]

The only one I know of is this:

http://www.amazon.com/Microprocessor-Design-Using-Verilog-HDL/dp/0963013351/ref=sr_1_1?ie=UTF8&qid=1418345488&sr=8-1&keywords=monte+dalrymple

[tggzzz]

Look on the manufacturer's websites for information about their softcores. Or search for opencores, or openhardware cores etc.

Otherwise, pick an early microprocessor (e.g. 8080, 6800, 6805, 1802) and implement the instruction set yourself. (You probably won't have the same external hardware interface, though! )

You will find that to be an excellent way of understanding engineering from high-level requirements through specification to implementation.

[Rasz]

start with this?
http://www.amazon.com/Computer-Architecture-Fifth-Edition-Quantitative/dp/012383872X

[ChrisW]

Or search for opencores, or openhardware cores etc.

I would avoid opensores like the plague.

[tggzzz]

Or search for opencores, or openhardware cores etc.

I would avoid opensores like the plague.

While I would be more than a little careful before I used anything (such as an opencore design) that hasn't been tested in production, the OP is interested in learning.

But I've also seen an awful of books and products that are very poor quality.

With an enquiring mind and appropriate attitude, You can learn from anything.

[nctnico]

Or search for opencores, or openhardware cores etc.

I would avoid opensores like the plague.

Why?

Because most of the designs on that website are mediocre at best.

If the OP wants to look at something which works then I suggest to look at Xilinx' Picoblaze or Lattice's LM32 softcore. The Picoblaze is a minimalistic design, the LM32 a full blown 32 bit processor.

[legacy]

i have quite completed my toy-softcore and its related debug processor
i find there is no real interest from the web, the only one interested are universities
so that is the best place to ask questions, i think 

[nctnico]

Just post it on your website. If people are interested they'll find it. What makes a good softcore are good tools like a C compiler. What would interest me is an MSP430 compatible processor. Unfortunately the ones I found so far are always geared towards creating a processor which uses the same amount of clock cycles per instruction etc. I don't care about that as long as it is functionally the same. If the VHDL code is clean you could bolt on stuff like a cache and improve pipelining.

[legacy]

Pipelining complicated the design, also it complicates the debug engine. In my case i used a multi cycle approach, so this is the reason why i call it "toy" 

[nctnico]

I have been looking into creating an MSP430 clone myself. There are two approaches: using a pipelined design at a high clock rate which needs several cycles to complete one instruction or create something slow with a lot of combinatorial logic which executes one instruction per cycle.

[legacy]

There are four approaches:

• single cycle
• multi cycle pipelined
• multi cycle not pipelined without fixed clock for stage
• multi cycle not pipelined with fixed clock for stage

my toy-softcore is using the last one, which means main clock dived by the number of stages, in my case n=5 stages, so 50Mhz / 5 = 10Mhz
the second approach performs the best because it permits instructions to be executed in parallel, so …. real 50Mhz

btw, you need a debug engine integrated with in the project, else way it is very complex to test and validate your softcore, this is my experience.

[nctnico]

I'd simulate it first before implementing it in real hardware. I think a book on designing processors also covers creating a test program which tests all the execution paths.

[photon]

A problem with single cycle execution of instructions is accessing off-chip memory. You want to support commodity memory like DRAM and NAND Flash but these devices take multiple clocks to read or write one piece of data. Load and Store are the processor instructions that will be impacted.

[legacy]

I'd simulate it first before implementing it in real hardware. I think a book on designing processors also covers creating a test program which tests all the execution paths.

yes, but it makes the test activity too long and boring, trust me, i have realized this idea implementing things in the real world: testing a soft core is not an amazing activity, it takes a lot of time an resources, so what you love is a way to dynamically test things because it can reduces the time you have to spent on simulators (which are slow)

i love the code injection approach with vector tests, the validation time is 4 time faster and amazing (instead of boring)

so you'd better go for a good debug engine as the one i have designed 

[BytesGuy]

Thanks for all the comments!

I did start looking at the pico blaze as my fpga board has a spartan 3e on it.

My idea was to just have some fun by trying to implement a z80 and other parts of the computer I have designed around it.

Thanks again, time to get to work