Can a group of 6 bipolar PROMs be replaced with a single PLD of some sort?

[MaximRecoil]

The PROMs are 82s131. There are 6 of them; they store color information in this application, which is a mid-1980s video arcade game which has 2 monitors (red, green, and blue for each monitor's video signal). The problem is that they're expensive because they're obsolete, they are difficult to program because many, if not most, programmers don't support them, and they are notoriously prone to failure in this particular application.

In this article, someone successfully replaced a single bipolar PROM on a different arcade motherboard with an an Atmel 27C512 OTP ROM. He talked about it having a fast enough access time, so apparently that's important. I suppose the same thing could be done for my application, but a daughter board containing 6 DIP28 chips would be pretty big.

[SeanB]

Depending on the application you could even get 2 or more into the one prom chip, providing you have enough data output lines. however you can use smaller chips, and then use the surface mount versions of them. This will make the SO28 package fit into almost the same footprint as the dip part it is replacing. You just need to either use a part that is faster than the original one, and where there are enough inputs and outputs.  you can even use a different PLD device that has either SPI or other serial programming inputs, and then make the appropriate ISP header on the board to get the data in, so you just need a single board to replace any of the 82S131 chips, as they are only a 9 input and 4 output chip anyway, and pretty much any more modern pld device can be used to replace it.

[rstofer]

http://www.arcade-cabinets.com/board_hacks/82S129-82S131-to-27512/

[MaximRecoil]

http://www.arcade-cabinets.com/board_hacks/82S129-82S131-to-27512/

Nice; that's a polished version of what the guy in the article I linked to did, but that won't work in this case because the group of 6 PROMs are too small and close together on the motherboard:



They are the chips with the homemade blue tape labels.

Something that could be put on a single PCB which plugs into all 6 of those DIP16 sockets at once, and which reduces the number of chips you have to buy to 1, would be good.

[radar_macgyver]

5V programmable logic is getting rare. The Xilinx 9500 series is obsolete and hard to find, but the 9500XL (3.3V, but 5V tolerant) can still be had (5ns pin-to-pin delay, 178 MHz clock rate). Lattice ispMACH4 is 5V tolerant as well, and has similar specs. You can get up to 288 macrocels in the 9500 series, and 256 in the MACH4, which should be plenty to replace a bipolar PROM. Instead of a piggyback board, consider using a PCB with DIP cables for each of the replaced PROMs.

[stj]

tell us what game it is so we can see the schematics.

[rstofer]

http://www.arcade-cabinets.com/board_hacks/82S129-82S131-to-27512/

They are the chips with the homemade blue tape labels.

Something that could be put on a single PCB which plugs into all 6 of those DIP16 sockets at once, and which reduces the number of chips you have to buy to 1, would be good.

I would use 6 ribbon cables between the sockets on the PCB and an adapter board.  It would be larger, of course, but it wouldn't distort the existing sockets.  Make sure you understand if all 6 PROMS are in the same address space and how Chip Select works.  I haven't thought about Arcade projects in a long time and I don't recall what the PROMs are connected to.  The most important part is whether they are all in the CPU address space or some other address space.

You won't need to use more than one copy of the address bits and, probably, one copy of the data bits.  What you really need to bring over is the chip select bits plus R/W or whatever it will be called.

I looked at my PacMan emulation and it appears at first glance that all of the PROMs are in the CPU address space.  I didn't track it all the way through...

[MaximRecoil]

tell us what game it is so we can see the schematics.

Punch-Out (Nintendo, 1984)

https://archive.org/download/punchoutschematicschp102/Punchout_Schematics_-CHP1_02.pdf

The color PROMs are on the BAK board, the schematic for which is located on the last page of that PDF file. There are two other boards in the set: CPU and Video board; the schematics for those are also in that PDF file.

I would use 6 ribbon cables between the sockets on the PCB and an adapter board.  It would be larger, of course, but it wouldn't distort the existing sockets.

Wire wrap legs actually work really well in the original, old-style single-wipe sockets that are on the motherboard set. In fact, Nintendo released a conversion kit for Punch-Out called Super Punch-Out, and part of that conversion kit was a daughter board which plugged into the main CPU (Z80) socket. It uses a wire wrap socket:



Even when that daughter board has been installed for ~30 years, you can remove it and put a Z80 back in there and it still fits fine. I recently reproduced that daughter board:



(original on the left)

And I used a new-old-stock wire wrap socket which was made by Texas Instruments, and it fits in the CPU socket beautifully; better than the original wire wrap socket that Nintendo used (which was made by Yamaichi). The original had a very tight, mushy feel when inserting it, with no good tactile feedback indicating when it was fully seated, while the TI one "snaps" in there, not too tight, not too loose, as if it were designed specifically for the job. I liked it so well that I replaced the blue Yamaichi wire wrap socket on the original with one of the black TI ones, as can be seen in the pictures.

As for using ribbon cables, I don't know where I'd mount a daughter board if not directly in the original sockets. Mounting options are limited, because the whole boardset needs to be able to slide into the arcade machine's shield cage.

[stj]

as i suspected,
each group of 3 has shared address bus.
so your after a fast memory with 9 address lines and 12 data bits

i would make a small pcb that sits across 3 sockets with a small 16bit tsop flash on it.
mostly because i can salvage those flash chips from old cable / sat boxes.

[westfw]

The 82s131 was a 50ns ROM.  You can get some flash chips that are that fast, but they're not very common.
What IS common is static RAM that is that fast (in particular, the 8bit wide cache RAM from the i486 days.)  I'd be thinking about a daughter-board with a modern static RAM and some microprocessor capable of loading it with the desired initial content...

[stj]

i doubt it needs to be that fast.
it's the dot-clock speed for a 15KHz video signal that it's timed with.

[BrianHG]

For 15Khz video, 70ns = 640 pixels (14.31818Mhz pixel clock), 140ns = 320 pixels without overscan.  These speeds are for a video mode of 240p or 480i but not guaranteed since you may have odd pixel sized clock cycles which do exist.

Note that when changing between address on cmos eproms, their output usually glitches randomly until the data valid time.  Now if your 6 proms have shared address, you might consider using a 32 data bit eprom.  This would make your expansion board just a few address lines + 4 data bits to each bipolar prom connector.  Obviously the extra 8 bits data IOs would be left open and all the extra address lines of the eprom would be tied to ground.

The AT27C1024-45JU is 45ns and only 16 bit, but since it is not dip, it's difficult to deal with.  You wont get faster for an old fashioned eprom.
If it was 1 year ago before I flushed my lab, I could have mailed you a bunch of dip AM27C1024-70, but it's too late for that...

SST39SF010A-70-4C-PHE is an 8 bit 70ns flash device which is 5v eprom compatible, 32 pin dip, but, only 8 bits.  you would need 3 of these.
For some reason, 55ns versions are only available in PLCC...
Arrow electronics has stock of the DIP version.
You will still need an eprom programmer which supports this IC.

[stj]

Now if your 6 proms have shared address, you might consider using a 32 data bit eprom.

no, it's 3 of them with a shared address bus, and then the other 3 share a different address bus.
horizontal res is between 200 and 240, vertical is about 59Hz,
standard RGB, so interlaced frames.

[BrianHG]

Go with 3x 8bit 70ns flash.  Your only addressing the first 512 words, the memory wont even swap a page, your output will be clean and fast.
The forementioned bit glitching should be ignored if the data output is feeding a clocked logic gate or clocked dac as the data is only sampled on the leading clock edge after once it becomes valid.

Note that 16bit proms still exist and are also in the 1-2$ range, but you cant's erase and reprogram them if you make a mistake.  The authentic eprom versions, basically a ceramic case with the eprom window actually costs around 350$.  Yes, 349$ for a glass window!!! (What on earth?)

Just use the oversized Microchip 128k x 8 eprom compatible which is a 32 pin dip, 2$, 70ns, 8 bits, arrange your data in you programmer's memory editor to fill only the first 512 words with the upper & lower 4 of the 8 bits with your prom's contents and hand wire 3 adapter boards for the 6 proms.
On your adapter, remember to tie all the unused addressees to GND.  Double check the chip enable and output enable.

Ohhh, looking at the circuit board, I see a resistor DAC.....
You might want to add a SN74ACT574N (+/- 25 ma/pin VS the eprom +/- read the spec) on the data outs and find the common clock to drive the 574's clock in.  Keep an inverter gate handy in case you need to inverse the clk signal.  This should give you a clean strong bright picture.  Driving the resistor DAC directly from the eprom wont look as good because of low power source and sink outputs.

You can try unclocked buffers like the SN74ACT245N, or 74LS574, or it's unclocked equiv.  This will alter the picture characteristics since the sink and source currents through the resistor divider will affect the picture.  Clocking the eprom will create a clean data output delayed by 1 pixel, but, no glitching introduced by the internals of the eprom.

Without the output buffers, the eprom has a 2v high logic level.  However the 82S131 has a high of 2ma, a sink of 16ma.

[CJay]

Now if your 6 proms have shared address, you might consider using a 32 data bit eprom.

no, it's 3 of them with a shared address bus, and then the other 3 share a different address bus.
horizontal res is between 200 and 240, vertical is about 59Hz,
standard RGB, so interlaced frames.

How wide are the address and data buses?

Do they have separate /CE for all chips or are they paired, I.E. three sets of two 82S123 per /CE?

Is it just one 8 bit data bus per set of three chips?

[BrianHG]

Now if your 6 proms have shared address, you might consider using a 32 data bit eprom.

no, it's 3 of them with a shared address bus, and then the other 3 share a different address bus.
horizontal res is between 200 and 240, vertical is about 59Hz,
standard RGB, so interlaced frames.

How wide are the address buses?

If it's an 82S131, it's 9 bits.
I would also like to know if the output enables are used, or shared, 1 bank of roms could be a background color pallet while the second could be and overlay sprite.  This means only 12 bit color (4 bit red/green/blue - 4096 colors), but your would need to take care of that appropriately.


Looking at the schematic, you would need 4 8 bit eproms, or, 2 16 bit eproms.  Note that the 16bit eproms for some reason, today, only come in SMD unless you want to use an OTP.

[obiwanjacobi]

I've seen One Circuit doing a bunch of repairs on these, perhaps he has some ideas...?

[2c]

[CJay]

Yes, just downloaded and printed the schematic (I love having an a3 printer at work)

Seems the address bus is 9 bits wide with the 9th bit being used to 'bank switch' within the PROMS, the data bus only uses 4 bits from each PROM but is used to generate three independent colour channels with a simple binary DAC arrangement.

So, as you say, two 16bit wide EPROMs or four 8 bit wide ones (though I do wonder if that could be reduced to three given a large enough memory depth)

If my thinking is correct (please correct me if it's not) to generate all possible colour combinations per bank in only 4KiB (16 levels per channel, three channels per bank) so I wonder if a PSOC might be fast enough, one PSOC per bank would be cheaper than EPROM as the prototyping boards are only $4.

[BrianHG]

Yes, just downloaded and printed the schematic (I love having an a3 printer at work)

Seems the address bus is 9 bits wide with the 9th bit being used to 'bank switch' within the PROMS, the data bus only uses 4 bits from each PROM but is used to generate three independent colour channels with a simple binary DAC arrangement.

So, as you say, two 16bit wide EPROMs or four 8 bit wide ones (though I do wonder if that could be reduced to three given a large enough memory depth)

If my thinking is correct (please correct me if it's not) to generate all possible colour combinations per bank in only 4KiB (16 levels per channel, three channels per bank) so I wonder if a PSOC might be fast enough, one PSOC per bank would be cheaper than EPROM as the prototyping boards are only $4.

There are 2 banks of roms because this video game has 2 displays.
The 12 bits are for 4 bit red, 4 bit green, 4 bit blue palette.  They seem to use 8 bit input, 256 colors, and from that a 4096 possible color palette.  The 9th bit on the address input is used for blanking the CRT gun during the horizontal & vertical sync and flyback.  This may mean that when the upper address bit is on, the color may be pure black while during screen display, the color shading may be between shades say 4 and 15, not 0 and 15, 0 being extra black reserved for the H&V raster times so you dont see those horizontal swiggly line on the monitor during the vertical flyback.

[DBecker]

I wonder if that is a gamma corrected output, with 6-7-6 levels of R-G-B.  That would yield 6*7*6 = 252 colors, which would fit neatly into the ROM.

The A8 address bit appears to trigger an alternate palette, perhaps inverted?
The ChipSelect input turns off the PROM to trigger the voltage levels for the sync pulses / blanking interval.

For those that haven't looked at the schematic, the PROM output bits feed resistor DAC,   The output does need a full TTL 5V swing to match the original color level exactly.  But most of the output current is at active-low since this part (like most TTL) can barely output current at a high level.  You could easily use a lower voltage memory with voltage regulator, resistor input divider and output diodes.

[james_s]

I think if I were going to do this, I'd make a custom daughterboard with some EPROMs. 5V capable PLCC32 EPROMs are still reasonably easy to find and the board would be small enough to get 10 boards for 10 bucks plus shipping from Smart-Prototyping. Seeed Studio has similar pricing, the boards cost a bit more but shipping costs a bit less, I usually compare.

[dtxy101]

[Hoffy84]

   Digging up this old thread, as I'd like to continue with this project.

   This color prom adapter was successfully implemented a while back, but in greater depth, and has only been described, but not detailed. The arcade game (Punch-Out!!) can be modified and play both games from the original game board (Punch-Out!! & Super Punch-Out!!) by switching a group of double-stacked eeproms as well as these cluster of proms. The color prom section, comprised of (6) 82S131's looks like it was adapted by a daughterboard that switched between (2) Atmel AT27C1024 44-pin PLCC chips (One for Punch-Out!! and the other for Super Punch-Out!!).

    I'm not interested in making the entire switching PCB, as that part should be pretty straight-forward to do. What I am interested in, is building a daughterboard as the OP subject had started. Below is a pic of the working switchable adapter board that was left out of this thread. It clearly uses a couple AT27C1024's to switch back and forth between two versions of a 6-bank array of 82S131's.

   So... (6) 82S131's = total of 54 address pins & 24 data output pins. If you can use one AT27C1024 which only has 16 address pins & 16 data outs instead, how the heck does that work? Does the data dump to the eproms have to be re-arranged, or do the pins merge, somehow? Or both??  I know the address pins are shared, but not sure how to make this all work. I'm good with Eagle, and have a burner/tester, but newer at this, and not quite sure how the programming/implementation of this can be done.

Any help would be appreciated. - Thanks! Jeff

[PCB.Wiz]

    I'm not interested in making the entire switching PCB, as that part should be pretty straight-forward to do. What I am interested in, is building a daughterboard as the OP subject had started. Below is a pic of the working switchable adapter board that was left out of this thread. It clearly uses a couple AT27C1024's to switch back and forth between two versions of a 6-bank array of 82S131's.

   So... (6) 82S131's = total of 54 address pins & 24 data output pins. If you can use one AT27C1024 which only has 16 address pins & 16 data outs instead, how the heck does that work? Does the data dump to the eproms have to be re-arranged, or do the pins merge, somehow? Or both??  I know the address pins are shared, but not sure how to make this all work. I'm good with Eagle, and have a burner/tester, but newer at this, and not quite sure how the programming/implementation of this can be done.

Any help would be appreciated. - Thanks! Jeff

You need to map the unique pins in that cluster.
There is a good chance the input side has multiple connections to each 82S131, but the 24 outputs are likely mostly used, so you would need at least 2 x 16i 16o 27C2014's
Do you have the 82S131's ? - you could dump the memory and extract the boolean logic.

The boolean logic allows you to explore using SPLD/CPLD like 22V10 or ATF1502 or ATF1504

The 82S131 looks to have 9 address pins and 4 outputs, not registered, 50ns 

In boolean terms, one of those could map onto a single 16V8, assuming no boolean combination exceeds 8 lines.
A 22V10 has more product terms on some pins  and the ATF150x parts can have even more boolean equation lines.

[peter-h]

A lot of normal EPROMs do <50ns if /CE is tied to GND and especially if /OE is tied to ground.

The normal quoted access time is from the address setup to data out, and in most EPROM applications the address gets set up much earlier.

But anyway as stated above the 50ns is very unlikely to be needed. In the 1980s it would have been hard work to build a PCB full of logic that fast, so most likely somebody used those chips because they were convenient. I used 256x8 fusible link PROMs (AMD Schottky TTL - ran pretty hot) in my final year at univ, 1978, where I designed somebody's else's final year project - a sine/triangle/square waveform generator, with the PROM holding the tables. The 8 data bits went straight to an 8-bit DAC, whose output had a ~100pF cap to GND to supress the glitches I could have used a 2708 or similar EPROM but these AMD chips were just handy, and easy to program.