Crystals and Caps

[GromBeestje]

When designing a PCB for an STM32 (and drop-in replacements) microcontrollers, I need to place some crystals for the low and high frequency clocks. The thing I am looking at is what the value for the caps at the crystals should be. I have found this https://blog.adafruit.com/2012/01/24/choosing-the-right-crystal-and-caps-for-your-design/ stating the rule of thumb is

C1 - C2 = 2*C_L – 2*C_stray

So, the C_L value is the value in the capacitor datasheet. The C_stray is the capacitance of the PCB. I'm not sure how to determine this value, but as the article suggests, I've used a value of 5 pF.

Now, let's say, I have a crystal 8 MHz, 20 pF.  This would give me (2*20)-(2*5)= 30 pF. And for the 32 kHz crystal, I've got 7 pF. (2*7) - (2*5) = 4 pF. Now, when I build a board with these components, and I use a STM32F103C8T6 microcontroller, the low frequency clock starts fine. However, when I use a GD32F103C8T6, the low frequency clock doesn't start. When I replace the caps with 15 pF caps, the low frequency clock does start.

One thing I notice, in the datasheet, for the STM part it states the recommended load capacitance is max 15 pF. For the GigaDevice part it says max 20 pF.  As these values say max, I've interpreted it as the value should be below, and 7 is below both values. I realise the input pins themselves have some capacitance as well. But I am not sure what this value is, and if this value is included in C_stray.

Basically, when using a higher value of capacitor, the GigaDevice part works. So, is this formula I'm using any good, or do I need a different approach for choosing crystals and caps.

[donotdespisethesnake]

I've never got the formula to give sensible results, so clearly there is something about its practical application I don't understand.

OTOH, using the same value as the reference design has always worked.

[T3sl4co1l]

STM32 oscillator tends to be on the weak side.  There's a recommended part to use -- higher ESR / lower C.

Probably the GD version is even more marginal?

Tim

[GromBeestje]

According to the ST oscillator design guide, 7 pF is the balance between low power and low drift for the low frequency crystal. That's why I decided to go for a 7 pF crystal. I could try and order a part that is in their list, and see if that part works with the original 4 pF caps.  If that works, what are the parameters of that crystal I need to look at to determine what went wrong? Or should I use different caps? Currently I'm using Samsung 4 pF 0805 C0G caps. Is that any good or should I use something different?

15 pF caps should correspondent with 12.5 pF crystals. Now I have mounted 15 pF caps next to a 7 pF crystal, what happens? What are the effects of this mismatch (apart from that it actually makes the oscillator start on the GigaDevice part). Does this result in drift? more power consumption?

edit: Thinking about this, the ST part works, so using the ST recommended part list to make the GD part work makes little sense. I guess I should check the GigaDevice site if they've a similar document online. But the question remains, am I using the right formula and value for C_stray?

[ejeffrey]

You are using the formula correctly.  The easiest way to see if the value is correct is to check the frequency.  If it is well within tolerance you have it right.  If the frequency is to low or too high your probably have too much or too little capacitance.

Does the stm32 have built in load capacitors for the crystal?  If so, are you sure they are disabled?  Using both internal and external capacitors would obviously cause a problem.

[wraper]

So, the C_L value is the value in the capacitor datasheet. The C_stray is the capacitance of the PCB. I'm not sure how to determine this value, but as the article suggests, I've used a value of 5 pF.

You should look into datasheet. When you have 7pF crystal and just assume out of your head that chip itself provides 5pf of load capacitance (which is already most of load capacitance you need), you can easily be 2 times off when selecting capacitors.

[Kleinstein]

The stray capacitance includes capacitance inside the oscillator circuit. With a low power chip this could well be less than 5 pF. The rule of thumb is 1 pF for every cm of wire of trace (a little, but not that much less for very thin traces).

Chances are there may be capacitor values between 4 pF and 15 pF that should work. The 4 pF is more like the lower limit and 15 pF is definitely at the upper limit, shifting the frequency a little. A larger cap could also add to the power consumption.

[SiliconWizard]

There may also be a difference in the max drive current of the oscillators between the two MCUs.

[GromBeestje]

So, the C_L value is the value in the capacitor datasheet. The C_stray is the capacitance of the PCB. I'm not sure how to determine this value, but as the article suggests, I've used a value of 5 pF.

You should look into datasheet. When you have 7pF crystal and just assume out of your head that chip itself provides 5pf of load capacitance (which is already most of load capacitance you need), you can easily be 2 times off when selecting capacitors.

I've found an input capacitance for the oscillator to be 5 pF on the ST part,  As the crystals are close to the mcu, the 5 pF should be right.
However, I haven't been able to find the value in the GigaDevice datasheet. If it has a lower value, then it explains the problem. Assuming it has only 2 pF input capacitance, I would need 10 pF.

There may also be a difference in the max drive current of the oscillators between the two MCUs.

I've got a value of 1.4 µA of LSE driving current for the STM part. The GigaDevice part mentions a "LXTAL oscillator operating current" of 6 µA.  Are they referring to the same thing, looking at how far the values are apart? If they do, the GigaDevice part has a much higer value. It sounds to me like the current used when the oscillator is active, internally and externally.


Another thing I've noticed, my 15 pF cap is a X7R part, while the 4 pF part is a C0G part. What is the correct type of cap for a crystal? C0G should be the correct type, right?

[wraper]

Another thing I've noticed, my 15 pF cap is a X7R part, while the 4 pF part is a C0G part. What is the correct type of cap for a crystal? C0G should be the correct type, right?

I wonder why X7R do even exist in such small capacitance. You shouldn't use them, C0G is the way to go. X7R are highly unstable.

[GromBeestje]

Another thing I've noticed, my 15 pF cap is a X7R part, while the 4 pF part is a C0G part. What is the correct type of cap for a crystal? C0G should be the correct type, right?

I wonder why X7R do even exist in such small capacitance. You shouldn't use them, C0G is the way to go. X7R are highly unstable.

Yeah, I bought these as a test for this problem. Just ordered the cheapest available in a small amount, and only noticed they were X7R after I bought them .

[PCB.Wiz]

I've got a value of 1.4 µA of LSE driving current for the STM part. The GigaDevice part mentions a "LXTAL oscillator operating current" of 6 µA.  Are they referring to the same thing, looking at how far the values are apart? If they do, the GigaDevice part has a much higer value. It sounds to me like the current used when the oscillator is active, internally and externally.

Those currents you are best to measure on a real device/pcb layout, as they can vary with Xtal, and loading caps...

Another thing I've noticed, my 15 pF cap is a X7R part, while the 4 pF part is a C0G part. What is the correct type of cap for a crystal? C0G should be the correct type, right?

Hmm, never knew they bothered with X7R at 15pF, and they seem a lot more expensive in volumes, so I wonder why they exist ? 
C0G, NP0 is what you need, avoid X7R as they will be quite lossy.

If the GigaDevice has higher Icc, it may be they missed a little on Xtal amp design, & higher Icc ones need higher CL to give the same phase shift.
(but that can also make the oscillator harder to start, as well as push down the operating frequency, meaning you need to source a higher pF spec Xtal )

You could try a series trimpot (220k down) on the XO pin, to see if that has a sweet spot. Check both running Icc, and startup times.

[bdunham7]

I didn't see this application note mentioned:

https://www.st.com/content/ccc/resource/technical/document/application_note/c6/eb/5e/11/e3/69/43/eb/CD00221665.pdf/files/CD00221665.pdf/jcr:content/translations/en.CD00221665.pdf

The whole thing is relevant, the most salient part starts at page 21.

Even shorter synopsis:  Is this a low-power or space constrained design?  If not, then a larger, lower ESR crystal and the appropriate larger capacitors will be the most stable and durable solution.

[OwO]

Now, let's say, I have a crystal 8 MHz, 20 pF.  This would give me (2*20)-(2*5)= 30 pF. And for the 32 kHz crystal, I've got 7 pF. (2*7) - (2*5) = 4 pF. Now, when I build a board with these components, and I use a STM32F103C8T6 microcontroller, the low frequency clock starts fine. However, when I use a GD32F103C8T6, the low frequency clock doesn't start. When I replace the caps with 15 pF caps, the low frequency clock does start.

The equation you are using is wrong. The MCU parasitic capacitance is per leg and is in parallel with each of your load caps, therefore you should only subtract it once. In your case you are off by 5pF. The correct load capacitance is 2*7 - 5 = 9pF.

[OwO]

I just checked the stm32 datasheet and it does not give a value for the oscillator pin capacitance, which means it's small enough that you can assume it's zero. The only parasitic capacitance there is is the PCB trace capacitance, which unless it's longer than 1cm has far less than 1pF of capacitance. The "rule of thumb" on the internet of 3-5pF is way too high of an estimate. If you've ever looked at microstrip stubs on a PCB with a network analyzer you'll know it takes a pretty long or fat trace to get 1pF of capacitance, especially at frequencies <100MHz. The actual correct load capacitance is probably closer to 2*7 - 1 = 13pF.

EDIT: the stm32 datasheet is actually ambiguous about oscillator pin capacitance. It gives a value of 5pF input capacitance when the pin is in external clock input mode but I'm not sure if it applies when in oscillator mode. The crystal oscillator section just says "Cstray is the pin capacitance and board or trace PCB-related capacitance. Typically, it is between 2 pF and 7 pF." Surely if the pin capacitance is already 5pF then Cstray can't be as low as 2pF?

[Yansi]

Correct load capacitors for 7pF  crystal are 6p8 (for STM32).

//EDIT: Added the important note about STM32.

[GromBeestje]

I didn't see this application note mentioned:

https://www.st.com/content/ccc/resource/technical/document/application_note/c6/eb/5e/11/e3/69/43/eb/CD00221665.pdf/files/CD00221665.pdf/jcr:content/translations/en.CD00221665.pdf

The whole thing is relevant, the most salient part starts at page 21.

Even shorter synopsis:  Is this a low-power or space constrained design?  If not, then a larger, lower ESR crystal and the appropriate larger capacitors will be the most stable and durable solution.

I must admit I don't understand all of what is in that document.  I've looked at the figure on page 20, where 7 pF intersects the low power and low drift. That's how I've decided to select 7 pF.

This is a research project, to see what's involved in making my own PCBs. One of the things I'm thinking about is running a comparison between some clones.

Another thing I wish to investigate is connecting the VBAT to a coin cell battery, to keep the time when the board is not powered. In this case I would care about the power consumption.

[bdunham7]

I must admit I don't understand all of what is in that document.  I've looked at the figure on page 20, where 7 pF intersects the low power and low drift. That's how I've decided to select 7 pF.

This is a research project, to see what's involved in making my own PCBs. One of the things I'm thinking about is running a comparison between some clones.

Another thing I wish to investigate is connecting the VBAT to a coin cell battery, to keep the time when the board is not powered. In this case I would care about the power consumption.

I'm not necessarily an expert in this area, but I recently solved a problem that had been "walked away from" by multiple supposed experts and it involved just this issue--unreliable crystal oscillator startup due to marginal design of the MCU.   I had to do some research and I learned a bit more than the basics of oscillators.  AFAIK, your options are:

1) Tweak the circuit board and load capacitors to match your marginal MCU  and cheap crystal (and hope your PCBs and MCUs are consistent).  This may result in a marginal, unstable, unreliable design.  Or most of them may pass QC and work for a few years.

2) Use bigger, lower ESR crystals and have a design with a greater safety factor so that component variance and drift won't move the parameters out of the safe operation zone.

3) Use a decent external oscillator and just connect it to the XTAL IN on the MCU, leaving the MCU oscillator circuit unused.  This is the most reliable solution and the most resistant to component variation or even drop-in replacement, which is apparently what happened in your case.  If you need low power, read this:

https://www.digikey.com/en/ptm/s/sitime/nanodrive/tutorial

I think those may even save power over using just a crystal.