FT2232HL JTAG Interface w/ UART?

[gnuarm]

We are adding a FT2232HL JTAG interface chip to a board being designed to program the FPGA.  It will only be added on the prototypes and not assembled for production saving the cost of the programming cables for every developer which are not cheap. 

The guy programming the MCU has asked to share the JTAG interface, so it will use a buffer chip and a jumper to select which device the four JTAG pins connect to. 

The software guy has also asked to use the serial port that the FTDI chip may or may not have.  I'm not familiar with this JTAG device at all.  Just as important is the driving software.  Does anyone know if this chip can be used for both JTAG and serial port operation without a lot of hassle, like switching between drivers or what ever?  Is this a reasonable goal?

[sicco]

The FT2232H is not a JTAG interface chip, but it can be used as JTAG interface chip. There are application notes on the FTDI website https://www.ftdichip.com/Support/Documents/AppNotes/AN_129_FTDI_Hi_Speed_USB_To_JTAG_Example.pdf on how to use it as JTAG USB interface. The FT2232H has by default two serial ports. They will show up (get enumerated) as COMX and COMY, for example COM12 and COM13 when the USB is plugged into your PC. One of these two, the lowest, or the 'A' port, can be used in ' MPSSE' mode. Once that's enabled, it will no longer be a COMX serial port (UART), but instead be enabled to do high speed clocked bit streams, synchronously (clocked) instead of asynchronously, in and out. With long words. Like 32 bits instead of ~8 bits/character for a normal serial port. And with that the JTAG interface can be made to work. The FT2232H port A pins are used for both the 'normal' serial port function and for the MPSSE mode. You thus rule out that it's both JTAG and serial port at the same time. However, the port B can remain serial port while the port A does MPSEE for JTAG. For MPSEE to work, you need the right driver (FTD2XX.DLL, .LIB, 32 vs 64 bits hassle...).The serial ports typically work with standard serial port USB drivers.
(I just went through the hassle of making a legacy BDM interface for the legacy the mpc8xx PowerPCs in the Tek TDS3000 scopes - BDM is a bit like JTAG - but different again...)
         

[langwadt]

We are adding a FT2232HL JTAG interface chip to a board being designed to program the FPGA.  It will only be added on the prototypes and not assembled for production saving the cost of the programming cables for every developer which are not cheap. 

The guy programming the MCU has asked to share the JTAG interface, so it will use a buffer chip and a jumper to select which device the four JTAG pins connect to. 

The software guy has also asked to use the serial port that the FTDI chip may or may not have.  I'm not familiar with this JTAG device at all.  Just as important is the driving software.  Does anyone know if this chip can be used for both JTAG and serial port operation without a lot of hassle, like switching between drivers or what ever?  Is this a reasonable goal?

yes you can use MPSSE (JTAG) in one port and serial in the other

with the right eeprom config you can also use the fast synchronous fifo mode in port and A
and MPSEE in port B

[RoGeorge]

The guy programming the MCU has asked to share the JTAG interface, so it will use a buffer chip and a jumper to select which device the four JTAG pins connect to. 

The software guy has also asked to use the serial port that the FTDI chip may or may not have.  I'm not familiar with this JTAG device at all.  Just as important is the driving software.  Does anyone know if this chip can be used for both JTAG and serial port operation without a lot of hassle, like switching between drivers or what ever?  Is this a reasonable goal?

Usually there is no need to use separate connectors for each JTAG chip.  All chips can share the same connector without any additional buffers.
https://www.fpga4fun.com/JTAG1.html

[gnuarm]

Thanks for your reply, very informative.  The design is copied from the eval board for the Gowin FPGA.  They provide a driver with their software.  So I guess it is up to the software if it supports the serial port at the same time.  That's what I needed to know.  Now I just need to figure out the pins to use for the serial.  I expect I can find that. 

A similar board using this part in a different package adds the EEPROM, but I don't know why that would be needed.  The Gowin board doesn't have it.  Ahhh... looking at the data sheet for the chip table 4.11 shows the modes that can be configured from the driver vs. the EEPROM.  Looks like we need to add the EEPROM for the async serial port. 

[gnuarm]

yes you can use MPSSE (JTAG) in one port and serial in the other

with the right eeprom config you can also use the fast synchronous fifo mode in port and A
and MPSEE in port B

Looks like an EEPROM is needed for the serial mode, right?

[gnuarm]

Usually there is no need to use separate connectors for each JTAG chip.  All chips can share the same connector without any additional buffers.
https://www.fpga4fun.com/JTAG1.html

In theory...  That requires the software to be aware of the other device and skip it as all the devices are daisy chained.  That doesn't always work out, at least not in the FPGA world.  A jumper is fine.  I'll use the FPGA driver and the software folks can use their drivers.  Better than two chips.  I'm not sure why he wants the JTAG.  He has the SWD port... on a 20 pin connector!  lol  But I guess they each have their advantages. 

[RoGeorge]

Looks like an EEPROM is needed for the serial mode, right?

The FTDI chip has an internal EEPROM and specific tools (from FTDI) to program it.

Usually there is no need to use separate connectors for each JTAG chip.  All chips can share the same connector without any additional buffers.
https://www.fpga4fun.com/JTAG1.html

In theory...  That requires the software to be aware of the other device and skip it as all the devices are daisy chained.  That doesn't always work out, at least not in the FPGA world.

No.  JTAG devices can be chained, this feature is in the JTAG specifications, and all compliant JTAG software knows how to deal with that.  The word "Usually" I used at the beginning of my sentence was about something else.

[gnuarm]

The Trenz board uses six additional pins to the FPGA and the EEPROM.  I see the somewhat sparse documentation says it supports both "JTAG and UART over Micro USB2 connector". 

https://wiki.trenz-electronic.de/display/PD/TEC0117+TRM

https://shop.trenz-electronic.de/trenzdownloads/Trenz_Electronic/Modules_and_Module_Carriers/2.5x6.15/TEC0117/REV01/Documents/SCH-TEC0117-01.PDF

I will use that design as a guide.

Anyone know if this requires preprogramming of the EEPROM or a special driver?  I don't see a mention of a driver but I haven't gone through the software as yet.  Is the EEPROM programmable via the USB port?

[langwadt]

yes you can use MPSSE (JTAG) in one port and serial in the other

with the right eeprom config you can also use the fast synchronous fifo mode in port and A
and MPSEE in port B

Looks like an EEPROM is needed for the serial mode, right?

I didn't think it was needed, but it looks like it in the table.

I know it is needed for the sync fifo mode, but you can change the mode afterwards with software

[langwadt]

The Trenz board uses six additional pins to the FPGA and the EEPROM.  I see the somewhat sparse documentation says it supports both "JTAG and UART over Micro USB2 connector". 

https://wiki.trenz-electronic.de/display/PD/TEC0117+TRM

https://shop.trenz-electronic.de/trenzdownloads/Trenz_Electronic/Modules_and_Module_Carriers/2.5x6.15/TEC0117/REV01/Documents/SCH-TEC0117-01.PDF

I will use that design as a guide.

Anyone know if this requires preprogramming of the EEPROM or a special driver?  I don't see a mention of a driver but I haven't gone through the software as yet.  Is the EEPROM programmable via the USB port?

the eeprom can be programmed via USB

the FTDI drivers come with both windows an linux

[gnuarm]

Thanks.  I've sent the info on to the software guy who wants the serial port.  I'll let him work out the software details since it's his need and his domain.

[RoGeorge]

If you are the one doing the hardware, than you should provide on the PCB one JTAG connector and another connector for a serial port.  These two connectors must be on all boards, not only the development ones.

The JTAG is used to program and/or debug all chips supporting JTAG from your board (all at one JTAG connector only, so you can access them without switching connectors or jumpers).  The COM port (serial) is used to send receive whatever data you need, for example to talk with the UBOOT or to SSH in Linux, etc.

A single FTDI chip can provide 2 "channels" (see the datasheet), that is why both the JTAG and the COM interfaces can be handled by a single FTDI.  This dual function is not critical, one can use as well two distinct programming cables, one USB to JTAG and one USB to serial.

That is why two connectors are needed, one JTAG and one serial connector (just the pins from the serial port of your chip, not the +/-12V RS232 level buffers like in a PC, but the same voltage as the rest of the JTAG, unless it was specifically requested to be RS232).  However, the connector's holes are needed on all boards.  You can leave the connectors unpopulated for production boards, and use pogo pins to program them, or use preprogrammmed chips, but the JTAG and COM holes must be available on all boards, development or production.

The FTDI chip with the USB (JTAG+COM) is usually sitting on the programming cable, not on the PCB.  You can either buy a FTDI JTAG cable and reprogram it, or make your own FTDI to JTAG on another small board attached to an USB cable, for the FT2232 alone.

What you see on devboards, where the FTDI chip (the programming cable) is included on the same PCB as the demo chip is an anomaly.  That method is used for learning purposes only, because the student might not have a JTAG cable and might not know how to connect it to the board (some JTAG cables have DUPONT wires you plug one by one in the JTAG pins of the board).

You can always buy a ready-made JTAG cable for whatever processor or FPGA you are using, otherwise you will need to "steal" the EEPROM content for your JTAG, because most of the proprietary IDE/toolchain will accept only their proprietary JTAG cable.  Do not use stolen software for your job.  Buy the darn cable and forget about the FTDI part.  Just add the two JTAG and serial connectors on the board, that's all.

[SiliconWizard]

Sorry if I've missed it, but what's the chip you want to access through JTAG? As said above, the FT2232HL can be used as a JTAG adapter (and it's very common in many JTAG adapters actually), but of course, software support must exist for the particular chip you're using. Else you may have to implement that yourself, doable, but which may not be what you intended. So knowing what chip it is is definitely required.

Then a couple remarks: yes the FT2232HL will require an external EEPROM - configured with the FT_Prog utility. The default behavior for the FT2232H, without EEPROM (or blank EEPROM) is, IIRC, two serial ports? To be able to use it in other modes, you need to configure it. Again IIRC, The port you want to use for JTAG must be configured as "FT245" (and then the software takes care of the rest). If it's not in FT245 mode, I don't think software can program it for JTAG. I may have mixed up the default settings though (from bad memory), but either way, I'm pretty sure you'll need to configure the EEPROM for a combination of 1 channel JTAG and the other UART.

The other related note is that of course you can absolutely have UART plus JTAG. The FT2232H has two ports. One can be used as JTAG, the other as UART. That again must be configured properly (once) with FT_Prog. This combination is again pretty common in JTAG probes, and even more so on FPGA dev boards. For a simple schematic of that, you can take a look at the schematic of the breakout board for the Lattice MachXO2 for instance.

[Bassman59]

You can always buy a ready-made JTAG cable for whatever processor or FPGA you are using, otherwise you will need to "steal" the EEPROM content for your JTAG, because most of the proprietary IDE/toolchain will accept only their proprietary JTAG cable.  Do not use stolen software for your job.  Buy the darn cable and forget about the FTDI part.  Just add the two JTAG and serial connectors on the board, that's all.

THIS.

For production, where you don't know who will be programming the boards after they are assembled, the best way to ensure success is to provide documentation that says, "Use Vendor Software XYZ and Vendor Programming Pod ABC to load the binary image."

[langwadt]

Sorry if I've missed it, but what's the chip you want to access through JTAG? As said above, the FT2232HL can be used as a JTAG adapter (and it's very common in many JTAG adapters actually), but of course, software support must exist for the particular chip you're using. Else you may have to implement that yourself, doable, but which may not be what you intended. So knowing what chip it is is definitely required.

Then a couple remarks: yes the FT2232HL will require an external EEPROM - configured with the FT_Prog utility. The default behavior for the FT2232H, without EEPROM (or blank EEPROM) is, IIRC, two serial ports? To be able to use it in other modes, you need to configure it. Again IIRC, The port you want to use for JTAG must be configured as "FT245" (and then the software takes care of the rest). If it's not in FT245 mode, I don't think software can program it for JTAG. I may have mixed up the default settings though (from bad memory), but either way, I'm pretty sure you'll need to configure the EEPROM for a combination of 1 channel JTAG and the other UART.

The other related note is that of course you can absolutely have UART plus JTAG. The FT2232H has two ports. One can be used as JTAG, the other as UART. That again must be configured properly (once) with FT_Prog. This combination is again pretty common in JTAG probes, and even more so on FPGA dev boards. For a simple schematic of that, you can take a look at the schematic of the breakout board for the Lattice MachXO2 for instance.

JTAG is MPSSE you can switch between UART and MPSSE with software don't need to program the EEPROM

FT245 Style Synchronous FIFO is special you must have an eeprom to use that but you can still switch port B to MPSSE in software

[SiliconWizard]

As I said, I was challenging my memory on this, but I still thought you needed an EEPROM for having both an UART AND MPSSE, and after re-reading the datasheet, it sounds right.
- You're right, MPSSE itself doesn't need an EEPROM and can be software configured without one.
- BUT as far as I got it, getting a port in UART mode requires an EEPROM. All you can do in software is to set the baudrate, but software only can't configure a port in UART mode without an EEPROM.

The table from the DS can be found in "4.12.1  Do I need an EEPROM?"

[fchk]

We are adding a FT2232HL JTAG interface chip to a board being designed to program the FPGA.  It will only be added on the prototypes and not assembled for production saving the cost of the programming cables for every developer which are not cheap. 

The guy programming the MCU has asked to share the JTAG interface, so it will use a buffer chip and a jumper to select which device the four JTAG pins connect to. 

The software guy has also asked to use the serial port that the FTDI chip may or may not have.  I'm not familiar with this JTAG device at all.  Just as important is the driving software.  Does anyone know if this chip can be used for both JTAG and serial port operation without a lot of hassle, like switching between drivers or what ever?  Is this a reasonable goal?

You could also use the FT4232HL (which has the same pinout and is only a little more expensive), connect Port A to the FPGA JTAG port, Port B to the uC JTAG Port and still have Port C and D free as UART ports. I've done just that in one of my recent designs. OpenOCD works just fine, and also the Lattice Standalone Programming tool works with this setup.

Another way is daisy-chaining the JTAG devices (programmer TDO to the TDI of the first device, TDO of the first device to TDI of the second device, TDO of the second device to TDI of the programmer), if the software supports this.

[langwadt]

As I said, I was challenging my memory on this, but I still thought you needed an EEPROM for having both an UART AND MPSSE, and after re-reading the datasheet, it sounds right.
- You're right, MPSSE itself doesn't need an EEPROM and can be software configured without one.
- BUT as far as I got it, getting a port in UART mode requires an EEPROM. All you can do in software is to set the baudrate, but software only can't configure a port in UART mode without an EEPROM.

The table from the DS can be found in "4.12.1  Do I need an EEPROM?"

the table must be wrong or confusing

https://www.ftdichip.com/Support/Knowledgebase/index.html?98installingft2232cdevices.htm

" If no EEPROM is fitted, the device will default to both channels configured as USB to UART interfaces using VCP drivers. "

[SiliconWizard]

As I said, I was challenging my memory on this, but I still thought you needed an EEPROM for having both an UART AND MPSSE, and after re-reading the datasheet, it sounds right.
- You're right, MPSSE itself doesn't need an EEPROM and can be software configured without one.
- BUT as far as I got it, getting a port in UART mode requires an EEPROM. All you can do in software is to set the baudrate, but software only can't configure a port in UART mode without an EEPROM.

The table from the DS can be found in "4.12.1  Do I need an EEPROM?"

the table must be wrong or confusing

https://www.ftdichip.com/Support/Knowledgebase/index.html?98installingft2232cdevices.htm

" If no EEPROM is fitted, the device will default to both channels configured as USB to UART interfaces using VCP drivers. "

It is not. You're confusing the FT2232H, which is a USB 2.0 HS device, with the FT2232C, which is much older.

[langwadt]

As I said, I was challenging my memory on this, but I still thought you needed an EEPROM for having both an UART AND MPSSE, and after re-reading the datasheet, it sounds right.
- You're right, MPSSE itself doesn't need an EEPROM and can be software configured without one.
- BUT as far as I got it, getting a port in UART mode requires an EEPROM. All you can do in software is to set the baudrate, but software only can't configure a port in UART mode without an EEPROM.

The table from the DS can be found in "4.12.1  Do I need an EEPROM?"

the table must be wrong or confusing

https://www.ftdichip.com/Support/Knowledgebase/index.html?98installingft2232cdevices.htm

" If no EEPROM is fitted, the device will default to both channels configured as USB to UART interfaces using VCP drivers. "

It is not. You're confusing the FT2232H, which is a USB 2.0 HS device, with the FT2232C, which is much older.

it is the same for the FT2232H, from the datasheet (page 27):

"If no EEPROM is connected (or the EEPROM is blank), the FT2232H will default to dual serial ports. The
device uses its built-in default VID (0403), PID (6010) Product Description and Power Descriptor Value.
In this case, the device will not have a serial number as part of the USB descriptor."

[SiliconWizard]

This statement is confusing compared to the table. I don't have a device around without an EEPROM that I could quickly test, so I can't check.

But I can tell you what is a configuration that I know works, that is what's done on Lattice boards, and what I've done with my own adapters, and I've made a few with the FT2232H.
EEPROM configuration is as follows (as set with FT_Prog - I had actually extracted this from a Lattice breakout board):

* Port A: (for JTAG)
- Hardware: 245 FIFO
- Driver: D2XX direct
* Port B: (fort UART)
- Hardware: RS232 UART
- Driver: Virtual COM Port

I can certify 100% that the above configuration works as intended, and that it's very likely NOT the default configuration.
I could give no guarantee at all about any other configuration. I've never tried, but I would have doubts.

I suspect (without being certain) the default for both ports is like how Port B is set up above, and I doubt (without being certain) that the same setup for JTAG access would work. Again, I can just tell what I definitely know will work. And I don't think risking a dead board is worth saving a few cents for the small required EEPROM. Now if someone has actually made the JTAG+UART configuration work with an FT2232H with the default config, please chime in. If not, I would tend to stick to what I know works instead of risking interpreting documents. Just my 2 cents.

[NorthGuy]

FT2232H is the same as two FT232H. Each may be configured independently. There are two types of drivers - VCP (serial) and FT2XX (may work in different modes including MPSSE for JTAG, but not VCP). If the device is taken by VCP driver, it cannot be used for FT2XX purposes and vise versa. As I remember, the driver used for the specific device must be specified in EEPROM.

Your FPGA may support talking through JTAG, in which case the second half of FT2232H for serial is total waste, and a single FT232H with a single connector will work just as well.

JTAG must supports a chain of devices. TDO of one goes to TDI of the other, making a huge shift register. Any JTAG software should support this. Not to mention that if you write your own, it's totally up to you what to support. Supporting a chain will require very little effort.

Software tools may require a license in EEPROM to use their software. Vivado is one of such tools. You cannot buy the license, only with their own programming cable. If you write your own software through MPSSE, this is not a concern - hardware doesn't require a license.

[langwadt]

This statement is confusing compared to the table. I don't have a device around without an EEPROM that I could quickly test, so I can't check.

But I can tell you what is a configuration that I know works, that is what's done on Lattice boards, and what I've done with my own adapters, and I've made a few with the FT2232H.
EEPROM configuration is as follows (as set with FT_Prog - I had actually extracted this from a Lattice breakout board):

* Port A: (for JTAG)
- Hardware: 245 FIFO
- Driver: D2XX direct
* Port B: (fort UART)
- Hardware: RS232 UART
- Driver: Virtual COM Port

I can certify 100% that the above configuration works as intended, and that it's very likely NOT the default configuration.
I could give no guarantee at all about any other configuration. I've never tried, but I would have doubts.

I suspect (without being certain) the default for both ports is like how Port B is set up above, and I doubt (without being certain) that the same setup for JTAG access would work. Again, I can just tell what I definitely know will work. And I don't think risking a dead board is worth saving a few cents for the small required EEPROM. Now if someone has actually made the JTAG+UART configuration work with an FT2232H with the default config, please chime in. If not, I would tend to stick to what I know works instead of risking interpreting documents. Just my 2 cents.

I suspect the table is to interpreted as the modes you can make the part plug as by programming the eeprom and the modes you need to enable via software after plugging

you config doesn't make sense because JTAG is done with MPSSE (but that can always be enabled via software)

245 FIFO is an 8bit parallel interface, that can be enabled via software but only after it has been enabled in eeprom

I've done FPGA configuration with MPSSE JTAG on port B and then after configuration enabled sync fifo on port A, that requires an eeprom

I think I have an FT2232 mini module somewhere, if I can find I'll try if it work as jtag and uart with out eeprom

[SiliconWizard]

you config doesn't make sense because JTAG is done with MPSSE (but that can always be enabled via software)

245 FIFO is an 8bit parallel interface, that can be enabled via software but only after it has been enabled in eeprom

It's 100% guaranteed to work. I would almost bet 1 million dollars on it.

The configuration of those chips is a bit confusing. Enabling "245 FIFO" in the EEPROM configuration actually makes the chip usable for many other modes, including MPSSE.
The available "hardware" config in FT_Prog are the following: "RS232 UART", "245 FIFO", "CPU FIFO" and "OPTO Isolate". Now what would make you think any of the other modes would make more sense for MPSSE? And AFAIR, if you set the chip for "RS232 UART" (which I think is default?), I'm not at all sure you can use MPSSE. To be confirmed.

And anyway, as I showed above but NorthGuy confirmed, I don't think you can use MPSSE with the VCP driver anyway - which, again, I think is default (TBC as well). So...