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How are math.h library functions like sqrt, asinf, tanf implemented in CoIDE
Posted by kody on 28 Dec, 2014 03:08 -
How are math.h library functions like sqrt, asinf, tanf implemented for the CoIDE compiler?
Need further information regarding the internal implementation(like taylor series?) to calculate the number of cycles taken for a certain program which implements these functions takes in FPU enabled Cortex M4 based MCU's. -
CoIDE is just an IDE. The actual implementation is done by the compiler(s) you hook to CoIDE, just like any other IDE.
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CoIDE is just an IDE. The actual implementation is done by the compiler(s) you hook to CoIDE, just like any other IDE.
the implementation is done by the library that came with the compiler, compiler is just that, to compile them. to know exactly whats going on, one need to dig the library, if one is lucky, they may find it in the form of plain source code, if one is unlucky, they may find it in the form of obj or precompiled stuffs. -
I have used the arm-gcc compiler. I have tried to search online for a good description of these functions in source code. But to no avail. Could you please provide any further sources?
Math.h is the library -
I believe that by default, the gcc compilers use a set of generic software floating point code as part of libgcc (https://gcc.gnu.org/onlinedocs/gccint/Soft-float-library-routines.html ), and higher level math functions as part of gcc libc ( http://www.gnu.org/software/libc/ ) All nice and portable, but not particularly fast or small.
Technically, these are separate from the compiler, and in fact are one of the things that a value-added compiler vendor might provide as "improved" versions. For example, avr-gcc has its own complete set of floating point routines. However, coide expects you to download the ARM compiler from launchpad.net, which claims to be using newlib or newlib-nano, so you can find code there, ie: https://github.com/32bitmicro/newlib-nano-1.0/tree/master/newlib/libm/math
It takes a brave (or desperate) vendor or engineer to implement new floating point math code...
Different libs for chips with HW floating point, of course. And cmsis-dsp has some specially optimized functions (apparently not direct replacements for libm functions, though.) CooCox does seem to have a bunch of peripheral libraries that replace the usual vendor libraries, but I don't see alternate floating point functions.
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How are math.h library functions like sqrt, asinf, tanf implemented for the CoIDE compiler?
At least for sqrt, usually a variant of newton's method is used to calculate the invert square root.
Need further information regarding the internal implementation(like taylor series?) to calculate the number of cycles taken for a certain program which implements these functions takes in FPU enabled Cortex M4 based MCU's.
See: http://en.wikipedia.org/wiki/Fast_inverse_square_root
Well, this is at least true for SW implementations, but I would assume that HW implementations use the same approach. -
I have used the arm-gcc compiler. I have tried to search online for a good description of these functions in source code. But to no avail. Could you please provide any further sources?
No. Math.h is a so called header file describing the functions. The actual library is libm. You have to look for the sources of libm. This can be tricky because the implementation depends on whether the processor you are using has a floating point processor or not.
Math.h is the library -
The processor I used is a STM32F4 it has FPU. But, we can have the option of enabling it or not.
So, by observing the documentation for these functions in libm code give some idea to calculate the number of cycles it took to calculate that particular function?
For example- for sinf function with fpu enabled - can we calculate the number of clock cycles consumed for it? -
Thanks @westfw! that was primarily what I would be concerned with.
I believe that by default, the gcc compilers use a set of generic software floating point code as part of libgcc (https://gcc.gnu.org/onlinedocs/gccint/Soft-float-library-routines.html ), and higher level math functions as part of gcc libc ( http://www.gnu.org/software/libc/ ) All nice and portable, but not particularly fast or small.
Technically, these are separate from the compiler, and in fact are one of the things that a value-added compiler vendor might provide as "improved" versions. For example, avr-gcc has its own complete set of floating point routines. However, coide expects you to download the ARM compiler from launchpad.net, which claims to be using newlib or newlib-nano, so you can find code there, ie: https://github.com/32bitmicro/newlib-nano-1.0/tree/master/newlib/libm/math
It takes a brave (or desperate) vendor or engineer to implement new floating point math code...
Different libs for chips with HW floating point, of course. And cmsis-dsp has some specially optimized functions (apparently not direct replacements for libm functions, though.) CooCox does seem to have a bunch of peripheral libraries that replace the usual vendor libraries, but I don't see alternate floating point functions. -
The processor I used is a STM32F4 it has FPU. But, we can have the option of enabling it or not.
So, by observing the documentation for these functions in libm code give some idea to calculate the number of cycles it took to calculate that particular function?
For example- for sinf function with fpu enabled - can we calculate the number of clock cycles consumed for it?
Can't you just run a benchmark and extract the numbers from it? -
Well, a quick search brings us to the manual:
http://www.st.com/st-web-ui/static/active/jp/resource/technical/document/application_note/DM00047230.pdf
From what I see there, it's single precision FPU with add/sub/mul/div and sqrt plus some MAC instructions, but no trigonometric functions.
Quoting the manual, the cycles needed are:Code: [Select]? Absolute value (1 cycle)Obviously, if they are part of a math library, this might need some additional cycles. E.g. if the check the value for a square root to be positive etc.
? Negate of a float or of multiple floats (1 cycle)
? Addition (1 cycle)
? Subtraction (1 cycle)
? Multiply, multiply accumulate/subtract, multiply accumulate/subtract then negate (3 cycles)
? Divide (14 cycles)
? Square root (14 cycles)
Anyway, the above functions are relatively "cheap" cycle wise. The trigonometric functions are then probably implemented using taylor series and accordingly expensive. -
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For example- for sinf function with fpu enabled - can we calculate the number of clock cycles consumed for it?
Yeah: most simulators will provide exact cycle counts for you; and you can use timers too - systick comes in handy for things like this.
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Hi dannyf,
When you say most simulators, can you please give some examples. Like open-source simulator software.
ThanksQuoteFor example- for sinf function with fpu enabled - can we calculate the number of clock cycles consumed for it?
Yeah: most simulators will provide exact cycle counts for you; and you can use timers too - systick comes in handy for things like this. -
Can we run the benchmarks from the CoIDE compiler?
The processor I used is a STM32F4 it has FPU. But, we can have the option of enabling it or not.
So, by observing the documentation for these functions in libm code give some idea to calculate the number of cycles it took to calculate that particular function?
For example- for sinf function with fpu enabled - can we calculate the number of clock cycles consumed for it?
Can't you just run a benchmark and extract the numbers from it? -
Thanks for the link 0deadbeeef. I too have it. The problem is, since I do not know how exactly the asinf and tanf functions are implemented. I can only keep guessing with these numbers.
Well, a quick search brings us to the manual:
http://www.st.com/st-web-ui/static/active/jp/resource/technical/document/application_note/DM00047230.pdf
From what I see there, it's single precision FPU with add/sub/mul/div and sqrt plus some MAC instructions, but no trigonometric functions.
Quoting the manual, the cycles needed are:Code: [Select]? Absolute value (1 cycle)Obviously, if they are part of a math library, this might need some additional cycles. E.g. if the check the value for a square root to be positive etc.
? Negate of a float or of multiple floats (1 cycle)
? Addition (1 cycle)
? Subtraction (1 cycle)
? Multiply, multiply accumulate/subtract, multiply accumulate/subtract then negate (3 cycles)
? Divide (14 cycles)
? Square root (14 cycles)
Anyway, the above functions are relatively "cheap" cycle wise. The trigonometric functions are then probably implemented using taylor series and accordingly expensive. -
If you need to know implementation... inspect the implementation!
Find the library and disassemble the routines, or at worst, write a "simplest example program" incorporating the interested function, and disassemble that (the machine code output is then necessarily part of the project, and any IDE worth its salt will provide a disassembled view of that output).
If you can't read ARM assembler... better get a book/guide and a pot of coffee...
Tim -
Thanks for the link 0deadbeeef. I too have it. The problem is, since I do not know how exactly the asinf and tanf functions are implemented. I can only keep guessing with these numbers.
It clear that these function will lead a lot of cycles. Indeed, if they're implemented with an accuracy threshold, the number of loops needed for approximation depends on the actual value.
Not the correct repository, but to get an impression:
http://svnweb.cern.ch/world/wsvn/vdt/trunk/include/tan.h
There is a fast tangens implementation there called fast_tanfm which avoids the iterations and is mostly linear.
In this fast implementation are about 15 multiplications and one division, plus a lot of additions and integer operations. I'd assume this will cost at least 100 cycles in sum. Probably more.
If the non-fast version with iterations is used, the runtime behavior will me much more unpredictable and thus should not be used in a realtime environment. -
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Can we run the benchmarks from the CoIDE compiler?
Yes, if you have a hardware debugger like st-link or jlink, + the actual hardware.
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How are math.h library functions like sqrt, asinf, tanf implemented for the CoIDE compiler?
Complex math function are typically implemented using Taylor Series. Slow, but accurate. -
How are math.h library functions like sqrt, asinf, tanf implemented for the CoIDE compiler?
Complex math function are typically implemented using Taylor Series. Slow, but accurate.
OP, you can use an implemented that trades accuracy for speed, for example a table driven piece wise interpolation. -
@dannyf - is it not possible if we only have the compiler? I mean, without the actual hardware/microcontroller.Quote
Can we run the benchmarks from the CoIDE compiler?
Yes, if you have a hardware debugger like st-link or jlink, + the actual hardware. -
How are math.h library functions like sqrt, asinf, tanf implemented for the CoIDE compiler?
Complex math function are typically implemented using Taylor Series. Slow, but accurate.
Or, where multiplications are expensive, CORDIC is used for some functions. http://en.wikipedia.org/wiki/CORDIC -
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inspect the implementation!
This is likely to be difficult, especially if you're using the the gnu libraries. The sort of code that is good for portability is frequently not very good for readability (although, the disassembled object code might be better than the source...)
Find the library and disassemble the routines
Keil has a free evaluation version (up to 32k code size), with simulator, that could probably be used to measure this without having actual hardware. OTOH, Keil may have their own libraries. (On the third hand, Keil is now owned by ARM, so they may be distributing the same libraries.) I guess that at least in theory, you could load up binaries produced by other compilers into the Keil simulator...
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is it not possible if we only have the compiler?
Yes. By looking at the delisting and counting up the instruction cycles.QuoteI mean, without the actual hardware/microcontroller.
A far better approach is to get the actual hardware.
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agree but not compulsary. setting the target hardware during compile time may produce whats wanted. if the target supports fptan then you'll see it in the dissasembler.QuoteI mean, without the actual hardware/microcontroller.
A far better approach is to get the actual hardware.