What does it even mean for a CPU to be "4 bit"?
Surely if it's going to be useful then RAM addresses are going to have to be at least 8 bits, if not 12 or 16. The same with program code addresses, if they are different. Maybe I/O space can get away with 4 bits (if it is different to RAM).
Surely instructions are bigger than 4 bits too?
A 4 bit ALU? Well, there's the Z80.
4 bit accumulator? I guess so. You can deal with booleans, decimal or hex digits.
Given all the things in it that *can't* be 4 bit, is it really that much of a savings over an 8051, PIC, even 6800 or 8080?
Generally, a CPU's bit width is the width of its data path. That makes the Z80 an 8 bit CPU despite the 4 bit ALU in early versions.
In reality its not so easy, there are always exceptions.
Was EDSAC a 1, 17 or 35 bit processor?
Is the MC68008 an 8, 16 or 32 bit processor?
There is a RISC V implementation (SERV) that processes 1 bit at a time but it's still a 32 bit CPU.
Bit width, like MHz, is a poor metric to measure performance or capability of a processor.
It's pretty fundamental (at least to me) that the bitness of a computer is a property of the instruction set, not the implementation. All CPUs that run the same instruction set have the same bitness. So the 68008, 68000, 68020 are all 32 bit. And all RV32 implementations are 32 bit.
It's tricky in the case of the "8 bit" microprocessors such as the 8080, 6800, z80, 6502, 6809 to decide whether they are 8 bit or 16 bit because they all have a mix of 8 and 16 bit features.
But whatever the answer is, it's a question that must be answered by looking at the programmer's manual, NOT at the physical circuit or the packaging.
Look at the z80. It has a lot of 16 bit registers. You can push and pop 16 bit registers. You can {add,adc,sbc} (but not sub) {bc,de,sp} to {hl,ix,iy} or add {hl,ix.iy} to themselves. There is 16 bit {inc,dec} on all registers. You can move {hl,ix,iy} to sp. You can load a 16 bit constant into any 16 bit register. You can load/store between an absolute address from any 16 bit register. You can exchange hl with de, or {hl,ix,iy} with the top of stack. You can exchange all of {bc,de,hl} with their shadow registers at the same time.
Other than the above move to sp or swapping hl and de, there are no 16 bit register move instructions -- you have to use two 8 bit move instructions ("ld" in z80 mnemonics). There is no 16 bit compare. There is no 16 bit load or store except to an absolute location -- you can't use any of the register indirect or indexed addressing modes. You have to do two 8 bit transfers, and adjust the pointer or offset between.
It's certainly much easier / shorter / faster to deal with 16 bit variables on the 8080 and z80 than on the 6502. But I think the killer, which alone disqualifies it as a 16 bit ISA, is that there is no 16 bit compare and the 16 bit arithmetic operations that do exist don't set flags in the way 8 bit ones do.
The 6809 on the other hand has 16 bit add and subtract and compare (only memory to register, not register to register, but that's the same with 8 bit). You can load or store any 16 bit register using the full set of addressing modes. You can move or swap between any pair of 16 bit registers. The only thing really lacking 16 bit operations is AND/OR/XOR and shift/rotate.
There is very little daylight between the 6809 (an "8 bit" CPU) and the 8088 (a "16 bit" CPU). The biggest difference is the segment registers.
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