Author Topic: How to calculate ADC output affected by errors  (Read 1275 times)

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Offline curiousDroop1Topic starter

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How to calculate ADC output affected by errors
« on: November 19, 2025, 11:33:06 am »
In order to characterize the ADC I'm working with, I try to create and calculate a worst-case-error-budget.
For that I use Gain Error, Offset Error, INL, DNL and Quantiziation Error (all in mV) and add them to my ADC-Conversion result.
From the information about the ADC specified in the µCs datasheet, i use the maximum values for those parameters. For example the maximum gain error is 25 LSB, which corresponds to a voltage of about 8.5 mV.
I also learned, that because the Gain Error becomes greater, the higher the input voltage, I have to convert the absolute value to a relative gain error, so that I have a value for every step of the transfer function.

So my formula is: V_Out = (1 + Gain_Error_rel) * V_in + Offset_Error + INL + DNL + Quant_Error

Is that correct? If not, I'm looking for a correct formula as well as an explanation as to how which error is handled in calculations like that. Sources on that matter, especially on how to handle Gain Error in such calculations would be greatly appreciated.
 

Offline Doctorandus_P

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Re: How to calculate ADC output affected by errors
« Reply #1 on: November 22, 2025, 02:06:09 am »
Maybe you can do something with the document below. It's from ST and specifically made for STM32, but the principles are very similar to any other uC with an ADC.
 


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