I agree with David. It is quite fast relative to anything else you do. The datasheet for the 16F84A in Section 6 describes interrupt latency. For an IOC on PORTB, it is 3 to 4 instruction cycles (Tcy). An instruction cycle is 4 oscillator cycles. Thus, at 8 MHz, an instruction cycle is 2 MHz (500 ns). I didn't see a specific latency for reading Timer 0 overflow which sets TOIF. I suspect it is at least that fast.
That chip does not save "context," i.e., WREG, STATUS and other important working values. It does save the return point on the STACK. Depending on your program and the ISR, you may and probably do want to save context, then restore context before returning from the interrupt. Saving context will take several more Tcy and there are efficient examples of how to do that in the datasheet. That may be somewhat automatic in C, I don't know.