this is the application note to use the USI as an I2C master, i understand how it should work but i am unsure how to put it in code
click me i am the application notehow i believe it works after reading about:
you have a data line and clock line, when the bus is idle both lines are pulled high from the two pull-up resistors at the end of the line.
only the master can initiate a data transfer and it does this by pulling SDA low while SCL is high which is the start command.
the SCL then starts pulsing at a set rate for example 100kHz as its max value but it can be slower, the SDA line can only transistion between high and low when the SCL line is low.
the first transmistion is an 8 bit address where the first 7 are an address for a slave on the bus and the 8th bit is the read/write bit depending on what the master wants to do to the slave. a 9th bit is then sent as low from the slave to acknowledge the bit transfer, if this bit is high then no slave acknowledged so the master does a stop command where it lets SDA go high when SCL is also high which is the stop command.
if the address is acknowledged then the master can proceed to send data to the slave, first the bit for the register the slave is meant to read/write to then an acknowledgement bit is returned and then the data for that register is sent followed by a returned acknowledgement. this is repeated for x amount of times depending on how much data/registers need to be changed. once the final byte of data is sent then the master initiates a stop command where it lets SDA go high when SCL is high and thats the end.
when the master wants to read from the slave it initiates the first byte with the write bit and then sends the byte register it wants waits for acknowledgement and then receives the data then followed by the acknowledgement bit.
if any acknowledgement bit is high the master initiates the stop command and goes back to being idle.
have i got that right?
if so how would i code that?