I doubt your are going to see high lane counts in inexpensive SoCs anytime soon.
Concur on that, but I was thinking 4 would be a good number.
Remember, it is perfectly possible to have an integrated controller with several devices and an internal PCIe switch communicate over a single width link. If for some reason you really connectivity to a bunch of separate chips, a discrete PCIe bridge is a reasonable option.
I did not know that such a thing as a PCIe bridge existed that would allow multiple devices to talk to a SOC on 1 lane !
And for jellybean IPs like ethernet and USB they can just be integrated into the SoC rather than added on as an external.
If your statement is correct, please speculate on why Broadcom did NOT integrate the USB and Etherent chips into BCM2711 ?
The way I look at it, if you want number crunching performance
(and clearly RPi did, did by selecting quad A-72 processors) die space can best be used by as much cache as possible !
Of course, what I say doesn't matter. This will be dictated by what the large customers want or need.
Concur ! So far, the BCM2711 seems to have only one customer, RPi. It is hard for me to believe that the volume of Pi 4 can cover the cost of the chip layout, but I have been out of that loop for a long, LONG time !
EDIT :The USB controller is a VIA Labs VL805 is a quad USB 3.0 (5 Gb) part that existed complete with a PCIe 2.0 interface.
Maybe the next Broadcom part will have the USB controller "built in" !
From
here The Ethernet is a native Broadcom device on the SoC, attached directly to the memory bus, not via PCIe.
The actual part is a BCM54213PE mounted on the RPi 4 board