Processors in space (radhard)

[mipl]

Hello all,

Some (interesting ?) summary of the CPU architectures (ISA) used for the (deep) space exploration:



It seems that US selected the PowerPC (BAE RADx) as the primary solution (https://en.wikipedia.org/wiki/RAD750), where Europe use the SPARC / LEON derivatives (https://en.wikipedia.org/wiki/LEON). As far as it could be know the fabrication of the newest LEON4 will be done (locally in France) by the STm in the 65nm process called by them as space node, they are also responsible for the analog part. The digital parts comes like before form the Gaisler / Cobham. Interesting that they started research regarding the Risc-V as replacement. Will it be new favorite ISA for all?
Currently Risc-V it could ride to space on the Rad Tolerant FPGA form Microsemi.

It would be interesting what the other space explorers use for there designs.
Some time ago on this forum was info about Russian HiRel ARMs. Is this there main CPU in space or are they using still the MIPS (https://en.wikipedia.org/wiki/ELVEES_Multicore) derivatives?
The China selection for the space cpu (is for me) puzzle, commercially there is possibility to select any ISA, but are they using also the HiRel derivative of MIPS, because the this ISA was named by the state as main (e.g. Loongson case)?
What about Japan, any Renesas ISA derivative in space (SuperH was used before)?

Kind Regards
 

[techman-001]

Hello all,

Some (interesting ?) summary of the CPU architectures (ISA) used for the (deep) space exploration:
(Attachment Link)


It seems that US selected the PowerPC (BAE RADx) as the primary solution (https://en.wikipedia.org/wiki/RAD750), where Europe use the SPARC / LEON derivatives (https://en.wikipedia.org/wiki/LEON). As far as it could be know the fabrication of the newest LEON4 will be done (locally in France) by the STm in the 65nm process called by them as space node, they are also responsible for the analog part. The digital parts comes like before form the Gaisler / Cobham. Interesting that they started research regarding the Risc-V as replacement. Will it be new favorite ISA for all?
Currently Risc-V it could ride to space on the Rad Tolerant FPGA form Microsemi.

It would be interesting what the other space explorers use for there designs.
Some time ago on this forum was info about Russian HiRel ARMs. Is this there main CPU in space or are they using still the MIPS (https://en.wikipedia.org/wiki/ELVEES_Multicore) derivatives?
The China selection for the space cpu (is for me) puzzle, commercially there is possibility to select any ISA, but are they using also the HiRel derivative of MIPS, because the this ISA was named by the state as main (e.g. Loongson case)?
What about Japan, any Renesas ISA derivative in space (SuperH was used before)?

Kind Regards

Interesting but not quite complete, I see no mention of the Harris RTX2000 / RTX2010RH Forth microprocessor used for deep space missions as recently as the Philae lander.
https://web.archive.org/web/20110204160744/http://forth.gsfc.nasa.gov/

Deep space is the one area where older proven technologies are the norm due to the $billions that can be risked with the loss of a single spacecraft.

[Gerhard_dk4xp]

We have used an industrial board based on a pentium laptop CPU with lots of SEU voodoo
around as the main controller. That was not deep space but ISS.

Then there were PicoBlazes in the FPGA.  I wrote the configuration memory scrubber
for the FPGA and a nice triple module redundant library that looked much like VHDL
std_logic... / signed/unsigned with the redundancy under the hood and barely visible.
I also modified the PicoBlaze  because it uses block rams for registers etc. and these
are really part of the configuration memory. Re-juvenating the configuration ram
kills the register contents. That caused some grief for the software lady.   

I don't think that American CPUs have a place in future space projects in the rest
of the world. Watch current American politics wrt TSMC just as an example.
No one with a brain will surrender himself into captivity if there is any other option.

I did not get the Xilinx TMR toolbox, so I wrote my own solution, which I feel is
better anyway (more fine grained). We ended up with bronze time FPGAs, we
could not even get the solder requirements for contemporary ones. And that for
a project intended for the ISS. Yes, one might have escalated that to the CEO
level and above, but I think the idea is just to create delays.
And that was pre-Donald. Just normal ITAR.

Others seem to have had the same problem. These are the results:

<  https://www.esa.int/Enabling_Support/Space_Engineering_Technology/Shaping_the_Future/High_Density_European_Rad-Hard_SRAM-Based_FPGA-_First_Validated_Prototypes_BRAVE    >
<   https://www.edn.com/brave-new-itar-ear-free-space-grade-fpgas/   >

Xilinx won't like that.

Cheers,
Gerhard

[filssavi]

AFAICT (I’ve been told this from someone that works routinely with NASA and probably ESA) the chart is misleading at best, the RAD is by far much more powerful than anything else, and almost the only choice for anything even remotely deep space. They are also extremely tightly controlled by the US government, so it is nigh on impossible to get hold of one outside the USA

[ignilux]

There was a recent thread on the r/FPGA subreddit concerning Xilinx' new radhard UltraScale devices.

[mipl]

(...)the chart is misleading at best, the RAD is by far much more powerful than anything else, and almost the only choice for anything even remotely deep space. They are also extremely tightly controlled by the US government, so it is nigh on impossible to get hold of one outside the USA

the chart was not to compare the features of each processor, it was more to show the history of the development form the architecture perspective. The BAE RAD is unique and there is a reason why it drives the Mars Science Laboratory on the surface, and there is a case why no public info about it also with a reason (they could be used also somewhere else), so in public it would not be possible to compare features...  But this is not the only processor that (crash- ) landed on the mars , e.g. Sparc / Leon-FT  in the Schiaparelli EDM ...
In addition there is a reason why ESA (European Space Agency) and others invest in own technology, e.g. in the commercial market because the case of the "ITAR-FREE" satellites.

I see no mention of the Harris RTX2000 / RTX2010RH Forth microprocessor used for deep space missions as recently as the Philae lander.
Deep space is the one area where older proven technologies are the norm due to the $billions that can be risked with the loss of a single spacecraft.

Yes, processor with HW support for Forth was not included, it could be seen as unique solution driven by the programming language (ASIC ?). In addition resources that it offers are limited, compared to the ones above.
The development process and design choices for such missions have own criteria.

We have used an industrial board based on a pentium laptop CPU with lots of SEU voodoo
around as the main controller. That was not deep space but ISS. (...)

Low Earth Orbit does not have many of the radiations issues, because Van Allen Belt. This simplifies many design choices, form the CubeSat to the recent SpaceX Dragon. The recent as design consideration had tipple x86. Each of them had two cores in shadow configuration. The decision would be made base majority voting (nothing unusual). The design selection is interesting, because in addition the SW base would be Linux and code in C++. All of this driven by re-usability. Would be nice to know what will be selected nu the SpaceX for the Moon / Mars missions, if we would see them coming.

[filssavi]

In addition there is a reason why ESA (European Space Agency) and others invest in own technology, e.g. in the commercial market because the case of the "ITAR-FREE" satellites.

Absolutely dont get me started on ITAR  whose only real goal IMO (which i fear it has achieved very well) is to stiffle leading edge research everywhere but in the US, while it has been lousy at best (more like completely useless) for it's stated goal (especially due to bipartisan US government led weapons deals with countries that notoriously support terrorism). So the sooner the world cuts off the USA dependency from critical supply chains the better.

P.S. I know that in most european countries ITAR does not really limits you too much but it makes everything much more difficult and expensive since there is a load of useless paper that has to be produced and signed.

[Alex Eisenhut]

https://en.wikipedia.org/wiki/RCA_1802

[nuclearcat]

We have used an industrial board based on a pentium laptop CPU with lots of SEU voodoo
around as the main controller. That was not deep space but ISS.

Then there were PicoBlazes in the FPGA.  I wrote the configuration memory scrubber
for the FPGA and a nice triple module redundant library that looked much like VHDL
std_logic... / signed/unsigned with the redundancy under the hood and barely visible.
I also modified the PicoBlaze  because it uses block rams for registers etc. and these
are really part of the configuration memory. Re-juvenating the configuration ram
kills the register contents. That caused some grief for the software lady.   

I don't think that American CPUs have a place in future space projects in the rest
of the world. Watch current American politics wrt TSMC just as an example.
No one with a brain will surrender himself into captivity if there is any other option.

I did not get the Xilinx TMR toolbox, so I wrote my own solution, which I feel is
better anyway (more fine grained). We ended up with bronze time FPGAs, we
could not even get the solder requirements for contemporary ones. And that for
a project intended for the ISS. Yes, one might have escalated that to the CEO
level and above, but I think the idea is just to create delays.
And that was pre-Donald. Just normal ITAR.

Others seem to have had the same problem. These are the results:

<  https://www.esa.int/Enabling_Support/Space_Engineering_Technology/Shaping_the_Future/High_Density_European_Rad-Hard_SRAM-Based_FPGA-_First_Validated_Prototypes_BRAVE    >
<   https://www.edn.com/brave-new-itar-ear-free-space-grade-fpgas/   >

Xilinx won't like that.

Cheers,
Gerhard

As i know ISS is under Van Allen radiation belt, so it is much easier.

[rrinker]

https://en.wikipedia.org/wiki/RCA_1802

Ding!

AND ultra low power, static CMOS so they can just stop the clock and wake up at any time later.

[Neomys Sapiens]

Also unmentioned is a part of the Intel lineup:
80C51
80C196
i80C186 (mfg. by Harris in a Silicone-on-Sapphire process)
i860 (still flying in India's launch vehicles)
i960
as well as the
Motorola 68k (aka Coldfire) in the guise of the General Dynamics Coldfire RH-CF5208
(and I suspect that there have been additional derivatives)

What did become of the RSRE Viper, by the way?
Unrelated at first glance, but I recently discovered that the company of the late Dr. Müller, Hyperstone, has ceased to offer it's combined µC/DSP of the same designation and is doing crappy Flash and memory management chips only.

[ehughes]

https://www.voragotech.com/products-main/#arm-microcontrollers


Vorago Makes some Cortex M parts.    I used the M0 for an XRAY instrument design.

[Xnke]

In addition there is a reason why ESA (European Space Agency) and others invest in own technology, e.g. in the commercial market because the case of the "ITAR-FREE" satellites.

Absolutely dont get me started on ITAR  whose only real goal IMO (which i fear it has achieved very well) is to stiffle leading edge research everywhere but in the US, while it has been lousy at best (more like completely useless) for it's stated goal (especially due to bipartisan US government led weapons deals with countries that notoriously support terrorism). So the sooner the world cuts off the USA dependency from critical supply chains the better.

P.S. I know that in most european countries ITAR does not really limits you too much but it makes everything much more difficult and expensive since there is a load of useless paper that has to be produced and signed.

If you think ITAR is anything the US wants...I got new for you. Nobody here wants it. It's a complete load of bullshit that does nothing to help anyone, but forces the cost of manufacturing up.