The SNR of the STM32 MCU ADC

[VanitarNordic]

Does anyone know how much is the SNR of the STM32 ADC?

I have two chips, STM32F103 and STM32F407, but I can not find any information about their ADCs SNR.

I want to know if it is good enough to use the internal ADC or use an external ADC chip.

[capt bullshot]

The perfomance of the ADC is widely dependent on its environment (as with any other ADC):

https://www.st.com/content/ccc/resource/technical/document/application_note/group0/3f/4c/a4/82/bd/63/4e/92/CD00211314/files/CD00211314.pdf/jcr:content/translations/en.CD00211314.pdf

So for short, they state: We do our best to provide you with an ideal ADC, but the result we achieve isn't ideal. We do not state (or do not know) the maximum achievable performance, but we give you a lot of hints what you should to come near. From their paper, one could determine the worst case static errors (INL, DNL, etc.) plus dynamic errors (resulting from non-ideal sampling), calculate the maximum SNR (which is depending on these errors at a given sample rate and signal frequency) from that and in theory one could achieve this performance from the ADC alone.

[VanitarNordic]

The perfomance of the ADC is widely dependent on its environment (as with any other ADC):

https://www.st.com/content/ccc/resource/technical/document/application_note/group0/3f/4c/a4/82/bd/63/4e/92/CD00211314/files/CD00211314.pdf/jcr:content/translations/en.CD00211314.pdf

So for short, they state: We do our best to provide you with an ideal ADC, but the result we achieve isn't ideal. We do not state (or do not know) the maximum achievable performance, but we give you a lot of hints what you should to come near. From their paper, one could determine the worst case static errors (INL, DNL, etc.) plus dynamic errors (resulting from non-ideal sampling), calculate the maximum SNR (which is depending on these errors at a given sample rate and signal frequency) from that and in theory one could achieve this performance from the ADC alone.

in the external ADCs (most of them), the SNR is one of the important parameters in the datasheet. Maybe for MCUs the SNR is not that much high.

[Gibson486]

They have a whole app data sheet that covers ADC performance.  Google AN2834.

[capt bullshot]

in the external ADCs (most of them), the SNR is one of the important parameters in the datasheet. Maybe for MCUs the SNR is not that much high.

What I intended to say: They give you a lot of information to do the math yourself, to calculate the SNR for your particular use case on your own. I must admit, I've never done that for my purposes anyway.

SNR is composed of many parameters, like these static parameters (INL, DNL), noise inherent to the ADC, noise induced by power supply, noise induced by sampling the input, distortion or noise induced by source impedance.

SNR is often given in external ADC datasheets, and it's rumoured MCU datasheets exist that specifiy SNR (or disguised as ENOB). But - if you find such SNR spec, you must read the datasheet very carefully to understand which application case and which external circuitry this particular SNR applies to. With external ADCs, the SNR usually is given for a very ideal use case - because marketing wants to see here a better value than some other ADC.

So for some use cases, e.g. audio and RF processing, SNR is important. If the datasheet specifies a SNR for your desired use case, this gives you a good hint of how well the ADC will perform in an optimal environment. Most MCU internal ADCs aren't targeted for audio or RF processing, so no SNR is given. This doesn't imply that the internal ADC must have a bad SNR.

For other use cases, you may want other specs to be good and SNR might be totally pointless, e.g. precise DC or LF signal measurement, or when you must get an accurate as possible single sample of your input, or you need a very fast settling to high accuracy. SNR spec won't help you here, you'd look at stuff like long term reference / gain and offset stability that aren't covered by SNR at all.

The DNL/INL specs will give you an idea of how precise the ADC can work, this has significant influence on SNR but doesn't cover noise. So to get started, you may want to compare these DNL/INL specs to your favourite external ADC to get an idea of how "good" the internal ADC is. Achieving long term stability and low distortion / noise is 90% your task with these internal ADCs. Of course, the MCU may be flawed, and internal noise couples into the ADC - then your goal is limited by rarely specified as this would look bad in the datasheet. That's the point where you gain experience and might be tempted to say "external ADC is better than internal".

[iMo]

60dB +/-2dB

[mvs]

Does anyone know how much is the SNR of the STM32 ADC?

I have two chips, STM32F103 and STM32F407, but I can not find any information about their ADCs SNR.

I want to know if it is good enough to use the internal ADC or use an external ADC chip.

With 12 bit SAR ADC you may get around 8-9 bits ENOB direct out of the box.... this is means around 50-56 dB SINAD.

[splin]

in the external ADCs (most of them), the SNR is one of the important parameters in the datasheet. Maybe for MCUs the SNR is not that much high.

What I intended to say: They give you a lot of information to do the math yourself, to calculate the SNR for your particular use case on your own. I must admit, I've never done that for my purposes anyway.

You can't calculate the SNR; you have to measure it. As pointed out by Gibson486, AN2834 provides some noise measurements for the STM32F407 - up to 24 counts peak to peak, reducing to 18 with Data+Instruction cache turned on and prefetch turned off. I got 25 counts at mid range on an STM32F407VG Discovery board. It's not particularly good so perhaps the reason it isn't specified in the datasheet?

https://www.st.com/content/ccc/resource/technical/document/application_note/a0/71/3e/e4/8f/b6/40/e6/DM00050879.pdf/files/DM00050879.pdf/jcr:content/translations/en.DM00050879.pdf

SNR is often given in external ADC datasheets, and it's rumoured MCU datasheets exist that specifiy SNR (or disguised as ENOB).

Pretty much all of the more recent MCUs with >= 12bit ADCs specify the ADC noise including all STM32F3 series, L4, F7, H7, most (all?) Kinetis, SAM, MSP etc.

But - if you find such SNR spec, you must read the datasheet very carefully to understand which application case and which external circuitry this particular SNR applies to.

Difficult since I don't recall ever seeing an MCU datasheet which specifies the measurement conditions beyond temperature and supply voltage. But you can be sure that the datasheet values will be the best that can be achieved - eg. with input at or near zero so that the noise of the reference is not included.

With external ADCs, the SNR usually is given for a very ideal use case - because marketing wants to see here a better value than some other ADC.

So for some use cases, e.g. audio and RF processing, SNR is important. If the datasheet specifies a SNR for your desired use case, this gives you a good hint of how well the ADC will perform in an optimal environment. Most MCU internal ADCs aren't targeted for audio or RF processing, so no SNR is given. This doesn't imply that the internal ADC must have a bad SNR.

Noise is relevant for *all* ADC applications including DC - a 12 bit ADC with 8 bits of noise would be pretty useless for most uses. But the majority of MCU 12 bit ADCs do have the SNR specified. 10 bit or less aren't (usually), probably because the noise is typically less than 1 LSB and thus not an issue for most users. If you increase the resolution by adding dither and oversampling then the noise is relevant but you would have to evaluate it yourself.

For other use cases, you may want other specs to be good and SNR might be totally pointless, e.g. precise DC or LF signal measurement, or when you must get an accurate as possible single sample of your input, or you need a very fast settling to high accuracy. SNR spec won't help you here, you'd look at stuff like long term reference / gain and offset stability that aren't covered by SNR at all.

SNR is almost never pointless - even in a DC measurement, resolution is limted by noise. You can oversample and filter (eg. by averaging) to reduce noise and increase resolution but this is limited ultimately by

a) flicker noise which increases at low frequencies at the same rate that increased averaging reduces it and
b) correlated noise that can't be reduced by oversampling.

For example I configured an STM32F407 ADC on a Discovery board to 2.4MSPS with the input driven by a two 800 ohm resistors as a voltage divider from Vref. Averaging by 10^6 reduced the peak to peak noise from 25 LSBs to .01 LSBs, .00163 rms or 18.6 noise free bits. Averaging by a 32 x 10^6 reduced the pp noise .0041 LSBs, .001 rms or 19.94 noise free bits.

The latter would be good enough for a 5 1/2 digit meter but INL and DNL limits accuracy to around 10 bits, but you could measure the INL and compensate for it to drastically improve accuracy. INL will vary with temperature so it wouldn't be easy to maintain accuracy over temperature and time.

The DNL/INL specs will give you an idea of how precise the ADC can work, this has significant influence on SNR but doesn't cover noise.

Errm, SNR is 'signal to noise ratio'. How does DNL/INL influence, which are static, DC specifications, influence SNR?

[splin]

Does anyone know how much is the SNR of the STM32 ADC?

I have two chips, STM32F103 and STM32F407, but I can not find any information about their ADCs SNR.

I want to know if it is good enough to use the internal ADC or use an external ADC chip.

With 12 bit SAR ADC you may get around 8-9 bits ENOB direct out of the box.... this is means around 50-56 dB SINAD.

The STM32F3 12 bit ADCs are specified at 11.2 bits ENOB/69dB minimum at 5.1MSPS, differential mode.

[capt bullshot]

Errm, SNR is 'signal to noise ratio'. How does DNL/INL influence, which are static, DC specifications, influence SNR?

Usually SNR is calculated from the results of a rather large window FFT with one steady low distortion sinewave, ideally phase locked to the sampling frequency. So everything that isn't ideal (sample clock jitter, quantisation noise, coupled noise, inherent noise, and non-linearitites) influences SNR. Long term full scale (reference) and offset stability doesn't influence this SNR.

If you look at the peak-to-peak noise alone, you see source, coupled and inherent noise, but nothing about distortion, jitter, and linearity.

So SNR is a good overall specification for an ADC but doesn't tell about all details that might be important for a particular use case. So quite often in MCU applications one wants low peak-to-peak noise and this typically depends in large scale on externals: supply, reference, decoupling, layout, source. Someone else showed me he is able to achieve peak-to-peak noise of 1 count for a STM32F1xx controller (without averaging), but not using the typical discovery or nucleo board.

[mark03]

Not sure why everyone is saying you have to measure or calculate it yourself.  It's right there in the datasheet, for multiple configurations, differential vs single-ended, etc.  At least it is for the STM32L4, and probably some others.  If your part doesn't spec the SNR, it's probably crap, and you should pick another family if it matters to you.

[mvs]

Does anyone know how much is the SNR of the STM32 ADC?

I have two chips, STM32F103 and STM32F407, but I can not find any information about their ADCs SNR.

I want to know if it is good enough to use the internal ADC or use an external ADC chip.

With 12 bit SAR ADC you may get around 8-9 bits ENOB direct out of the box.... this is means around 50-56 dB SINAD.

The STM32F3 12 bit ADCs are specified at 11.2 bits ENOB/69dB minimum at 5.1MSPS, differential mode.

Perhaps one can get around 11 bits, if a measurement of one single channel is the only goal.
But in real world scenario, having multiple channels and other peripherals on, not so perfect layout and signal conditioning, it is very unlikely to get somewhere near this number.

[SiliconWizard]

Not sure why everyone is saying you have to measure or calculate it yourself.  It's right there in the datasheet, for multiple configurations, differential vs single-ended, etc.  At least it is for the STM32L4, and probably some others.

It is indeed in the STM32L4 datasheets, at least all of the models I've used (476, 433, 496).
It's not stated in the STM32F4x7 datasheet for some reason. It is in the STM32F469 datasheet though (I haven't looked at other models).

[splin]

Errm, SNR is 'signal to noise ratio'. How does DNL/INL influence, which are static, DC specifications, influence SNR?

Usually SNR is calculated from the results of a rather large window FFT with one steady low distortion sinewave, ideally phase locked to the sampling frequency. So everything that isn't ideal (sample clock jitter, quantisation noise, coupled noise, inherent noise, and non-linearitites) influences SNR.

No, non-linearities don't influence SNR. INL non-linearity causes harmonic distortion which is not included in the SNR calculation, but is included in SINAD.

There is a very specific and probably uncommon case (wrt MCU ADCs): DNL can increase quantization noise of very low level signals, providing that the ADC effective input noise is less than 1LSB - which is unlikely with >= 12 bit MCU ADCs.

Someone else showed me he is able to achieve peak-to-peak noise of 1 count for a STM32F1xx controller (without averaging), but not using the typical discovery or nucleo board.

You mean the ADC only output a single code? That's impressive and very surprising but it does corroborate this from a very similar thread started by the same OP:

In a board with a proper layout, I've been able to get around 1LSB of noise out of a F4, so I would suggest you read the DS again, make sure that the clock is set up correctly, make sure there is not another function trying to use the ADC pin as well, or just change to a different pin for a test. Check that you have the capture time set up aligned to the ADC clock.

[splin]

Does anyone know how much is the SNR of the STM32 ADC?

I have two chips, STM32F103 and STM32F407, but I can not find any information about their ADCs SNR.

I want to know if it is good enough to use the internal ADC or use an external ADC chip.

Presumably this is a continuation of this thread:

https://www.eevblog.com/forum/microcontrollers/stm32-adc-noise/msg1918397/#msg1918397

Frankly I got very confused as to what exactly you were trying to do and why the internal ADC wasn't good enough. I asked for some more information:

What are the maximum and minimum amplitudes of the signal that you want to measure?

What accuracy do you need?

What frequency range does the signal have?

Is the signal a sine wave, of a single frequency, at any one time? (ie. when making a single measurment).

Is the signal constant and for how long?

Do you have to have a measurement result every 250us or could it be longer or shorter?

Could the signal have a constant DC offset?

You subsequently said you are using a differentiator:

Although I am using this circuit with AC coupling https://www.electronics-tutorials.ws/opamp/opamp_7.html

one limitation I have is that the circuit uses a battery and a single supply. I have to power the OpAmp with the single supply techniques. at the moment I inject a voltage to the + rail.

and:

in this specific application, we want to amplify mV range signals and measure them by the ADC,

That isn't enough (for me at least) to understand what you are trying to achieve and what performance/accuracy/timing requirements you have.

To understand your problem and try to provide assistance, it would help if you could provide answers to at least some of the above questions. One important question I missed is:

What is the dynamic range of the signal - ie. the largest and smallest amplitudes?

[capt bullshot]

No, non-linearities don't influence SNR. INL non-linearity causes harmonic distortion which is not included in the SNR calculation, but is included in SINAD.

You're right, mixed that up.

Someone else showed me he is able to achieve peak-to-peak noise of 1 count for a STM32F1xx controller (without averaging), but not using the typical discovery or nucleo board.

You mean the ADC only output a single code? That's impressive and very surprising but it does corroborate this from a very similar thread started by the same OP:

Not a single code, rather slightly flickering between two codes (that's what I'd define as one count as 1 is the difference between n and n+1). For a real stable one code (@input voltage at the middle of the code) output I'd say 0 counts noise, but that's really rare to see with 12Bit and more, easier to achieve with 10Bit ADCs.