What "Motion Control" peripheral does ?

[BravoV]

The only explanation after reading TI documents, that its designed & made for motor control, and no explanation for other applications, nor examples at other usages except for controlling motor only. Currently I have no interest on controlling motor, maybe some day when I started playing with quadrotor stuffs, but not now.

Questions :

1. The 2 QEI parts , am I correct that I see this as a dedicated module to decode signals say like from normal rotary encoder without having to face with the code complexities like other mcus that don't have it ? Like freeing us from worrying writing a tight ISR or missing pulse or cpu usage/utilization and etc.

2. PWM parts, could we use it for power switching purposes ? If the answer is yes, so this should free the cpu cycles from the real time control loop say like voltage regulation and etc like analog counter part does, am I right ?

If you have other comments or insights that I missed regarding this topic, please share it as well.


This is my 1st journey into the ARM realm, so please gentle, thanks.

[mrflibble]

1. The 2 QEI parts , am I correct that I see this as a dedicated module to decode signals say like from normal rotary encoder without having to face with the code complexities like other mcus that don't have it ? Like freeing us from worrying writing a tight ISR or missing pulse or cpu usage/utilization and etc.

Yup. The stm32f4 for example also has this feature. Used it recently, damn handy.

2. PWM parts, could we use it for power switching purposes ? If the answer is yes, so this should free the cpu cycles from the real time control loop say like voltage regulation and etc like analog counter part does, am I right ?

That would be the general idea yes. Use the PWM output as the logic level inputs for your mosfet gate drivers.

[BravoV]

mrflibble, thank you. 

[Hypernova]

Generally, for "motor control" class PWMs they would have:
-at least 3 pairs of complementary output. This is for 3 phase motors.
-High PWM counter frequency.
-Ability to sync the clock between the channels.
-Deadband generator unless you want to risk shorting your inverter out.
-Provision to sync sampling of QEP and ADC to the PWM.
-At least one GPIO pin can be assigned for hardware override shut down.

[ballanux]

[img]
2. PWM parts, could we use it for power switching purposes ? If the answer is yes, so this should free the cpu cycles from the real time control loop say like voltage regulation and etc like analog counter part does, am I right ?

You still will have to calculate the duty cycle you want for the PWM, so the cpu will not be free of that task

[mrflibble]

You still will have to calculate the duty cycle you want for the PWM, so the cpu will not be free of that task

That would seem rather obvious since that's the whole point of having a mcu like that in the loop in the first place.

[ballanux]

That would seem rather obvious since that's the whole point of having a mcu like that in the loop in the first place.

Good point   

Although calculating that duty cycle for a motion control application is far form obvious 

[jahonen]

Perhaps two most distinct features of a motor control PWM are 1) ability to synchronize the ADC sampling instant to the PWM point where low-side switches of the output stage conduct, so current measurement becomes considerably easier and virtually noise free 2) ability to create a complementary signal with dead-time between high and low branches of complementary output signals to drive the output switches (or drivers of them).

The main idea behind whole motor control block is that for high-performance motor controls, you'll want to do current control loop as frequently as possible, ideally once per PWM period. You really want to start current control calculations only after all currents have been AD-converted.

Regards,
Janne

[richcj10]

Perhaps two most distinct features of a motor control PWM are 1) ability to synchronize the ADC sampling instant to the PWM point where low-side switches of the output stage conduct, so current measurement becomes considerably easier and virtually noise free..

This also could be done with good design and board layout.

[jeroen74]

Even more important is that you can configure that instant, e.g. which clock cycle within the PWM period the converter has to convert. After all you don't want to sample before the reading has stabilized.

This has nothing to do with good design and board layout; unless you provide hardware that can provide a current throughout the whole PWM cycles, but this is usually more expensive and adds parts. Just letting the ADC free run will certainly not work, but you could handle it from the PWM ISR, but takes quite some software overhead.

So, it's a good feature; which basically takes almost nothing logic-wise in the MCUs design.

Also essential is dual slope PWM, IIRC this is a requirement for space vector modulation.

[richcj10]

Even more important is that you can configure that instant, e.g. which clock cycle within the PWM period the converter has to convert. After all you don't want to sample before the reading has stabilized.

This has nothing to do with good design and board layout; unless you provide hardware that can provide a current throughout the whole PWM cycles, but this is usually more expensive and adds parts. Just letting the ADC free run will certainly not work, but you could handle it from the PWM ISR, but takes quite some software overhead.

So, it's a good feature; which basically takes almost nothing logic-wise in the MCUs design.

Also essential is dual slope PWM, IIRC this is a requirement for space vector modulation.

I am stating that you don't need to worry about noise from switching (at pin) with a good design (Caps, FB, Etc.) and proper board layout.

[BravoV]

So the conclusion is "IF" we're going to use the PWM part for switching power, even though the cpu is relatively fast, still there is no escape that the regulation loop still depends on the cpu, am I correct ?

Even though the the pwm's isr and the fault condition's isr (as for the regulation loop) are categorized as high priority interrupts,  tightly coded and guarded by built-in hardware watchdogs (Is this too much  ? ), still the regulation loop will never be same as dedicated analog switcher ic does like pulse to pulse regulation and etc, CMIIW. 

Please, don't get me wrong, fully aware that in reality, especially if this is just one off project, just slap in a dedicated switching power supply chip should clear up this thing, but again, this discussion is pure academical for me in learning and understanding these new generation mcu's peripherals.

[jahonen]

Yes, you could use this for power supply purposes. I think if you run your control loop on each PWM period, there is no advantage for analog PWM controller since analog PWM loop bandwidth must still be limited much below PWM frequency. I would think that these two would have rather similar dynamic characteristics.

I think that one application area for DSCs (digital signal controllers) is power supply type applications, so I think it is not so bad idea at all. See for example this appnote from TI (for C2000 but you'll get the idea): http://www.ti.com/lit/an/spraab3/spraab3.pdf

And regarding the sampling, having an asynchronous sampling means that one would have to apply quite heavy filtering to the measured current signal to suppress all the noise (usually inavoidable due to non-ideal components regardless of the layout). This filtering has negative effect on the dynamics of the current control loop. This makes asynchronous sampling always an inferior solution.

But when sampling instant is synchronous to the PWM frequency, and provided that all switching transients decay much faster than the PWM period, then we can make very simple and high bandwidth measurement of the current by just sampling just on the right moment, as we don't see any transients. This also makes it possible to measure phase currents with low-side sense resistors and simple amplifier instead of relatively complicated high-side current sense. A mentioned, this arrangement has very little additional cost so it is really a no-brainer. Of course, a good layout and design is still required.

Regards,
Janne

[jeroen74]

You typically use these MCUs to implement Field Oriented Control to control motors, which is way, way more complicated then a simple switcher circuit and basically impractical to implement in analogue hardware. For FOC you need to update the PWM period every cycle to get the sinusoidal drive to the motor. In this respect, plus a few lower speed controls. For this  substantial computing power is required.

[BravoV]

Janne, thanks for pointing that app note, really an eyes opener for me in digital loop at dc to dc converter. 

All this time I've been reading only the Stellaris class related documents, never touched that C2000 class mcu.

Really like particularly at this illustration :


So, say the mcu is running at full speed @80Mhz = 12.5 nS at each cycle, while using the the built-in ADC that is capable of 1 MSPS with hardware based samples averaging, also with the capable mcu that efficiently handles the PWM ISR cycle by cycle regulation, can I conclude it is safe "to assume" that this chip capable of handling the regulation of power switching converter at 100KHz switching frequency smoothly ? 

[jahonen]

I think it should work, but best way, as always, is to try it out and measure timings in practice. Simple measurement with a pin-switching and an oscilloscope should give a pretty good idea what is going on.

For these kind of hard real time applications, it is not enough to have enough timing margin as an average but it must have enough margin in all possible cases. Your control algorithm does not probably like it if it misses an interrupt period. I'd guess that is no problem if CPU core behavior is deterministic enough (i.e. designed for these kind of applications).

My experience is that ARM7 was not very good with hard realtime things, but what I have understood, a Cortex-M4 should be a completely different beast.

Regards,
Janne

[BravoV]

For these kind of hard real time applications, it is not enough to have enough timing margin as an average but it must have enough margin in all possible cases. Your control algorithm does not probably like it if it misses an interrupt period. I'd guess that is no problem if CPU core behavior is deterministic enough (i.e. designed for these kind of applications).

As you see at the stellaris cpu architecture at my 1st post, it has two watchdog timers with 64 bits counter each which is good enough imo, and as usual these "dogs"  generate NMI. With it's clock configured and synch-ed with clock for the pwm module, I pretty sure the digital loop behavior is deterministic enough, cmiiw.

Anyway, I'm aware all of these are just talks, implementation will be another beast to tame, but I'm content now and understood it pretty well imo, thanks for the replies, really appreciate all helps contributed.