Design info: Power 2KW, input voltage 26V, output voltage 208V, transformer primary turns 1, secondary turns 8, leakage inductance 0.27µH, switching frequency 100KHz, dual active bridge (DAB) topology, a full bridge on the primary side, a full bridge on the secondary side, using leakage inductance as the resonant inductor, maximum phase shift φ/π of 0.48.
Debug Description:
Currently, the code only sets the phase shift angle φ, primary-side dead time, secondary-side dead time, and transmission direction (primary → secondary). In the software settings, a count value of 1 corresponds to 5 ns (for example, a count value of 10 corresponds to 50 ns). One cycle count value is 2000. The power transfer formula is verified in open loop; the DC power supply used for the primary side is set to 23V, 120A; the DC load for the secondary side is adjusted so that the output voltage is 184V.
The four issues are described in detail as follows:
1. The power value calculated using the power transfer formula deviates too much from the measured data.
Power transfer formula:P=V1*V2*φ*（1-φ/π）/2/π/f/L/n
The fixed primary-side dead time is 200ns, and the secondary-side dead time is 125ns. See the attached figure 'data1' for the measured data.
The fixed phase shift is 60, the primary side dead time is 35, the secondary side dead time is 25, and the transmission direction is primary → secondary. By changing the load current, we captured different secondary transformer current waveforms using an oscilloscope (we can't measure on the primary side; on the secondary side, the current waveform can be measured through the line). We extracted the linear segments and used V = L * di/dt to back-calculate the leakage inductance to verify the design parameters, but it still doesn't match. The measured data can be seen in the attached figure 'data2'.
2. During the testing of transformer Vp and Vs voltages, it was found that changing the vertical scale on the oscilloscope caused the test values to change.
Oscilloscope probes: Zhiyuan ZP1500D, RIGOL PVP2150; Oscilloscope: RIGOL DS1102
DS1102 (X50) ZP1500D (X50): When the vertical scale is set to 5V or above, the tested Vp in the current linear region is around 27V; when the vertical scale is 2.5V or below, the tested Vp in the current linear region is around 16V; this issue does not occur when measuring Vds.
DS1102 (X10) PVP2150 (X10): When the vertical scale is set to 5V or above, the tested Vp in the current linear region is around 27V; when the vertical scale is 2.5V or below, the tested Vp in the current linear region is around 16V; this issue does not occur when measuring Vds.
3. When only the external phase angle φ is changed, Vp shows a 0V voltage plateau. When Vp is 0V, the Vds of all four full-bridge transistors is 0V, meaning the full bridge is in a direct-through state (because the 0V voltage plateau is positively correlated with the external phase value—the larger the external phase value, the longer the 0V voltage plateau lasts. I tried setting the external phase to 400, and upon no-load power-on, the power supply immediately outputs 120A). Therefore, the focus of the problem is that the MOSFET's Vgs is below the conduction threshold, but Vds is still close to 0V. See the oscilloscope images in the attached files 'data3' and 'data4'.
4. The original primary full-bridge cannot achieve ZVS (watching the secondary current waveform shows the current direction is correct, and increasing the current value has no effect on achieving ZVS). I guess it might be affected by issue 3. When S1 and S4 turn off, the Vds of S2 and S3 drops very slowly. When I delay the dead time, I find that the Vds of S2 and S3 stops dropping after reaching a certain value, and after a while, it even rises.
At the moment, I have no ideas about the above issues. I’m seeking advice from everyone, thanks!
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