[PCB Review][modified]XIAO ESP32-C6 carrier board 1-Wire sensor ds18b2 unshielde

[vonhoff]

  Hi everyone, first-time PCB designer here. Simple 2-layer carrier board
  for XIAO ESP32-C6, designed in KiCad 10, targeting JLCPCB assembly.

  Reads DS18B20 sensors via 1-Wire, 0.8–3m unshielded flat cable (1.2mm
  silicone). Environment can be electrically noisy and cables get handled
  regularly, so I went heavy on protection. Two JST PH 3-pin connectors
  for sensors (both on one 1-Wire bus, addressed by ROM code). Board size
  28×45mm.
 
  Protection chain per channel (connector → MCU): ferrite 600Ω on VCC +
  ferrite 600Ω on DQ → common-mode choke (ACM2012-900-2P) → TVS
  (UCLAMP3301D) → shared DQ bus → USBLC6-2SC6 dual ESD → 4.7k pull-up →
  XIAO GPIO.
 
  2-layer ENIG, GND pour both sides, XIAO hand-soldered after PCBA
  (castellated pads). USB-C power only.
 
  I'd appreciate a review — worried about EMC filtering on the unshielded
  cables, ESD protection approach, and any rookie layout mistakes. Is a
  snap-on ferrite toroid on the cable at enclosure exit a reasonable
  fallback if EMC pre-scan shows issues?
 
  Schematic, 3D render and copper layer attached.

  BOM:
  100nF                     - C1 C3 C4     - 0805          - C49678
  10µF                       - C2              - 0805          - C15850
  1µF                        - C5              - 0805           - C28323
  600Ω Ferrite           - FB1-FB4       - 0805          - C1017
  4.7kΩ                    - R1               - 0805          - C17673
  UCLAMP3301D       - TVS1 TVS2    - SOD-323    - C5199861
  ACM2012-900-2P   - CM1 CM2      - 0805 CM     - C145854
  B3B-PH-SM4-TB     - J1 J2            - JST PH        - C160353
  USBLC6-2SC6        - U2               - SOT-23-6    - C2687116

[PGPG]

Protection:

Electronics speak with schematics and not list of elements that you have to guess how they were connected.

[vonhoff]

sorry for that

[pcprogrammer]

There is no protection on the 3V3 supply line. If someone accidentally connects a higher voltage on one of the JST connectors the ESP32-C6 is fried.

Your routing is not optimal. See the bits I marked with red outlines as examples of bad routing. It is better practice to use 45 degree angles and avoid a very sharp angle like in the center of the board. For the slanted point to point connection the trace might turn out ragged, so a short 45 degree angle and then straight down is better.

Did you even make a proper schematic for this design?

It is good practice and can avoid errors to have a proper schematic to create a net list from and use that to route the PCB and verify that all the connections are correct. Not a big issue for a simple board like this, but when it becomes more complex it can save you from having to redo a batch of PCB's.

Edit: If you want your ferrite bead in the signal line to have real effect add 1nF capacitors to ground before and after the bead. No need to split the signal for the two sensor connectors and have separate ferrite beads for them. Just have the two sensors in parallel and only use a single ferrite bead filter and TVS protection on the single line. The pull up for the 1 wire bus can be much lower in value to increase noise immunity. I have had it work with 820 Ohm. Something to experiment with.