12.8 MHz from 10 MHz

[Brumby]

I don't know enough about the users application to make that call. For example: What if they need to lock the 12.8MHz to the 10MHz coming from an external source?

That was the direction of my thinking as a first reaction.  Clarifying if this was the case would be one of the first questions I would be asking.

The answer could change your options drastically.

[German_EE]

Drive one of your DDS modules with the 10 MHz signal and generate 2.8 MHz. You then mix together 10 MHz and 2.8 MHz and feed the result through a 12.8 MHz bandpass filter and amplify.

[AndyC_772]

Cypress CY22393F

[bson]

For some reason I missed that it's for a radio LO - yes, using a uC FLL for that probably would be too noisy.  However, I think you'd find the noise spectrum dominated by 1/w meaning the DCO-FLL doesn't add much high frequency noise as it's more prone to wander, which the FLL counteracts, than jitter, necessarily.  Jitter would be fixed spurs from the FLL stepping, and those might be suppressable.

But that's kind of a back-asswards way of solving it, and there are definitely easier solutions.  (Maybe just build an oscillator with a PLL, no need for a VCO since it's fixed frequency and all you need to do is phase lock it.)

Edit: PLXO circuit design seems to be beyond what's easily found on the net... I guess most just drop in a programmable PLL clock synthesizer and call it a day.

[arduinew]

Hello,
re
"Here are two solutions requiring 12.8MHz VCO or VCXO
1)
Divide 12.8MHz by 32 so you get 400kHz
Divide 10MHz by 25 so you get 400kHz again but duty cycle isn’t exactly 50% but that’s not a problem.
Phase compare both 400kHz signals using 74HC86 gate and feed output of 74HC86 gate via loop filter to 12.8MHz VCO/VCXO. "

I am curious, the thread starter, Mojoe, wanted 12.8MHZ, so how does he divide to 400k what he hasnt got?!
But assuming he can,
could U pls explain the above to me.. why 400kHz? i get that 400k is a divided 12.8, and the 74HC86 Xor function, but how does that help?
Thanks!
Arduinew

[CJay]

Hello,
re
"Here are two solutions requiring 12.8MHz VCO or VCXO
1)
Divide 12.8MHz by 32 so you get 400kHz
Divide 10MHz by 25 so you get 400kHz again but duty cycle isn’t exactly 50% but that’s not a problem.
Phase compare both 400kHz signals using 74HC86 gate and feed output of 74HC86 gate via loop filter to 12.8MHz VCO/VCXO. "

I am curious, the thread starter, Mojoe, wanted 12.8MHZ, so how does he divide to 400k what he hasnt got?!
But assuming he can,
could U pls explain the above to me.. why 400kHz? i get that 400k is a divided 12.8, and the 74HC86 Xor function, but how does that help?
Thanks!
Arduinew

Necro post mate, the original thread is from 2018.

[eblc1388]

"Here are two solutions requiring 12.8MHz VCO or VCXO
1)
Divide 12.8MHz by 32 so you get 400kHz
Divide 10MHz by 25 so you get 400kHz again but duty cycle isn’t exactly 50% but that’s not a problem.
Phase compare both 400kHz signals using 74HC86 gate and feed output of 74HC86 gate via loop filter to 12.8MHz VCO/VCXO. "

I am curious, the thread starter, Mojoe, wanted 12.8MHZ, so how does he divide to 400k what he hasnt got?!

If you re-read the above quote carefully, you'll notice it said "Here are two solutions requiring 12.8MHz VCO or VCXO". The OP will need to build/obtain an 12.8MHz oscillator first, either a VCO or a VCXO for the solution to work.

Getting this oscillator is not the problem, it is making it always generate 12.8MHz with the same accuracy of the reference 10MHz OCXO. The solution is to phase lock it's output to the OCXO's 10MHz output but this can only be done if the two sources share a common frequency. The idea is to divide these frequencies with different divisiors so they end up at the same frequency. It turns out that 400KHz is the common frequency which can be obtained from both 12.8MHz and 10MHz with different divisors of 32 and 25. After such divisions, both 400KHz outputs can be fed to a phase comparator resulting in an error control voltage which can be used to steer the 12.8MHz oscillator back to the target frequency. Now the 12.8MHz is "sync" or "lock" to the 10MHz OCXO and have the same stability. 

A VCXO is a better choice as the frequency change per control voltage would have much finer resolution around the target frequency.

I hope this will answer your question.