A type of instability seen in feedback ac-coupling of in-amp

[alishirali]

Dear all,

I'm just testing the idea of ac-coupling an instrumentation amplifier (hear I tested both AD620 & AD8220) by a feedback from output to reference pin. The circuit and output are attached. In the test experiment, non-inverting input (IN+) is connected to VGND and inverting input (IN-) is derived by a small amplitude pulse around VGND (blue line). The pulse is generated by a 555 IC then buffered and damped by an LM358 IC. V_CM is O.C. Output and input are plotted red and blue respectively, with the aim of Arduino serial plotter. VCC is connected to 5V battery.

The problem: as it was expected, the rectangular pulse input is amplified and high passed exactly with the 1/(RF*CF) HPF (I imported data for different frequencies to Matlab and checked the spectrum). The problem is the output envelope which looks like a first order circuit charge and decharge and I can not stop it from oscillation.
I have simulated the circuit in PSpice and no such effect exists there.
The problem get better but not solved if I replace AD8220 by AD620.

I have tested different ideas to solve this problem but non of them was successful. Any idea on the cause of the problem and its possible solution will be greatly helpful for me!
Thanks is advance 

[duak]

You have accidently designed an oscillator.  U2A forms an integrator that has a 90 degree phase shift.  U1 will also introduce a phase shift and at some frequency, the two will combine to give net positive feedback.

You might be able to cure this by adding a resistor in series with CF to alter the phase shift at mid to high frequencies.  Alternately, you might try to reduce the gain of U1 and then add another gain stage outside of the feedback loop.

[dmills]

Not sure it isn't U2B in combination with the cap load formed by C_T1, C_T2 causing the honk, opamps really do not in general get on with capacitive loads.

Regards, Dan.

[alishirali]

Tnx Duak,
I can not persuade myself that U1 and U2A are forming an oscillator but I tested your idea and the results are as follows. First I reduced the gain by increasing RG from 1k to 10k, keeping all other values unchanged. Then for the case of lowest gain (RG = 10k) I added a resistor in series and parallel to CF. As the results show, I think non of these helped me to avoid the oscillation.

[alishirali]

Tnx Dmills,
I removed C_T1 and C_T2 and posted the results in reply to Duak. No significant change occurred and the output still oscillates.

[dmills]

That still leaves you with all your other decouplers connected to Vgnd, try putting those caps back and sticking 100R or so between the output of U2B (AFTER you tap off the feedback) and the Vgnd node.
 
Opamps in general really dislike capacitive loads.

Regards, Dan.

[duak]

Alishirali,

You will have to make some changes to the bypass capacitors as dmills has suggested.

I didn't notice that the integrator formed by U2A can "wind up", that is, its output can drift until the opamp reaches its minimum or maximum value or U1 becomes non-linear because its REF input is out of range for the given conditions.  One way to solve this is to place a large value resistor across C - start with 1M0.

Best Wishes,

[David Hess]

The supply splitter will be unhappy driving the decoupling capacitors.  You might get away with that by swamping its output with a 10 to 100 microfarad aluminum electrolytic capacitor.

What is the supply voltage?  You may be exceeding the input common mode range of the instrumentation amplifier.

[Zero999]

The supply splitter will be unhappy driving the decoupling capacitors.  You might get away with that by swamping its output with a 10 to 100 microfarad aluminum electrolytic capacitor.

What is the supply voltage?  You may be exceeding the input common mode range of the instrumentation amplifier.

This. One solution is don't connect any capacitors to the output of the rail splitter. Connect the decoupling capacitors across RB1 and RB2.

It's true, the output impedance of the rail splitter will rise, at higher frequencies, but it's the same op-amp as the others in the circuit, and their performance will also degrade at higher frequencies.

[duak]

Alishirali, I looked at the datasheet for the AD8220 again and realized that I confused the AD8220 with a module that I used many years ago.  It was like an instrumentation amplifier, but it had a different internal design.  This means that my comments above are wrong and I apologize.

You have said that there is another first order effect in your test circuit.  Are you able to show us a schematic of the test circuit?  If not, is there a capacitor in series with the test signal to the AD8220 -input?  Is there a resistor from the -input to VGND for the input bias current?

Do you see a difference in the waveforms if you reduce the amplitude of the test signal?

Best Wishes,

[David Hess]

The supply splitter will be unhappy driving the decoupling capacitors.  You might get away with that by swamping its output with a 10 to 100 microfarad aluminum electrolytic capacitor.

This. One solution is don't connect any capacitors to the output of the rail splitter. Connect the decoupling capacitors across RB1 and RB2.

It's true, the output impedance of the rail splitter will rise, at higher frequencies, but it's the same op-amp as the others in the circuit, and their performance will also degrade at higher frequencies.

I have tried that before and removing the decoupling capacitors always caused problems with the rest of the circuit; the AC impedance was just too high.

This article from Analog Devices discusses the problem with driving a capacitve load in detail and shows one way to solve it at the end.  This can work however the impedance rises at medium frequencies so getting it right can be tricky.

A better solution in my experience is to place a bulk decoupling capacitor directly at the output of the operational amplifier to one of the supply rails; 10 to 100 microfarads is typical.  Combined with the output resistance of the operational amplifier, this lowers the bandwidth enough to prevent loop oscillation.  The ESR creates phase lead adding to the stability of this configuration so use a standard aluminum electrolytic or tantalum part.

Some operational amplifiers can drive any capacitive load by lowering their own bandwidth and would not require any additional measures although they would still benefit from a bulk decoupling capacitor at their output.

[alishirali]

That still leaves you with all your other decouplers connected to Vgnd, try putting those caps back and sticking 100R or so between the output of U2B (AFTER you tap off the feedback) and the Vgnd node.
 
Opamps in general really dislike capacitive loads.

Regards, Dan.

I removed all bypassing capacitors (C_T1, C_T2, C_B_GND, ...) and added 100 and 10  from U2B output to VGND. No significant difference occurred