Author Topic: Bit Error Rate Tester Determination of State  (Read 466 times)

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Offline SparkFly

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Bit Error Rate Tester Determination of State
« on: April 23, 2018, 03:22:14 pm »
I'm looking into making a low frequency (couple of MHz) BERT on a fpga, but am coming across a dilemma when building the receiver to decide upon whether a bit is 1 or 0. How is this decision performed in a typical instrument? I know of some techniques on 'real' systems involve taking multiple measurements and then choosing the 'middlemost' value as the bit state, others apply filtering etc. What is worth considering when designing this for a BERT to measure a system's susceptibility to EMI? Should I just go as simple as possible by using a clock at double the data rate to take the bit state in the middle of the bit? I would think by applying filters/other methods you would also be measuring the receiver;s ability to filter/correct data etc, rather than focusing on the channel itself?

Or do commercial BERTs rely upon a variety of input conditioning for each testable comms protocol?

Many thanks in advance.
 

Offline mikerj

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Re: Bit Error Rate Tester Determination of State
« Reply #1 on: April 24, 2018, 11:58:51 am »
Or do commercial BERTs rely upon a variety of input conditioning for each testable comms protocol?

A commercial BERT will typically have adjustable decision threshold and phase.
 
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Offline Sparky49

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Re: Bit Error Rate Tester Determination of State
« Reply #2 on: April 24, 2018, 04:45:41 pm »
Thanks for the reply mikerj, I presume you are talking about threshold voltage? What I'm really interested in is how a noisy (ie flickering between 0 and 1) single bit would be arbitrated.

I've attached I diagram to better (hopefully) explain what I'm talking about. If you only sample the very centre of a bit, bit 1 would look like a 0, despite it looking very much like a 1. bit 2 would be fine, but bit 3 looks like it might be either. Alternatively if you sampled each bit 10 times and went with a majority to determine the bit, bit 1 would bit a 1, bit 2 0 and bit 3... who knows lol. :P

Is there a standard way of doing it on BERTs, especially if you were more interested on the effects of say emi on a transmission line? i suppose for that you'd want the simplest way of arbitrating a 1 or 0, rather than adding any filters etc?

EDIT: Realise I forgot the attachment!
« Last Edit: April 24, 2018, 06:08:12 pm by Sparky49 »
 

Offline mikerj

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Re: Bit Error Rate Tester Determination of State
« Reply #3 on: April 24, 2018, 05:20:52 pm »
The BERs I use make a decision at a single (adjustable in amplitude and phase) point in the eye.  An oversampling/majority decision scheme may provide improved noise immunity in practical use but it won't tell you as much about the quality of your signal.

Then again these are all running at 10GBits+, so opportunities for oversampling are a little more limited :)
 
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Offline Sparky49

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Re: Bit Error Rate Tester Determination of State
« Reply #4 on: April 24, 2018, 06:09:04 pm »
Fantastic, thanks very much mikerj, that's exactly what I wanted to hear. :D

May I ask which BERT you use?
 


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