Bypassing the error amplifier on UC3842/UC3843 (Unitrode DN-89)

[Whales]

I came across an interesting Unitrode design note (attached) showing how to bypass the error amplifier in the UC3842 switchmode controller:

Because the flyback design shown in the figures requires isolation, an external error amplifier is used on the secondary side to sense the output voltage. The internal error amplifiers in the UC3842 and the UCC3802 are configured for unity gain and are essentially not used. The UCC3809 was de-signed without an internal error amplifier, greatly reducing its silicon size and cost. A single pin (FB) sums the current sense signal, the voltage feed-back signal, and any added slope compensation. The UC3842 and the UCC3802 require three pins to perform these functions.

Annotations mine, crossed out bits do not matter for steady state operation:



I don't quite understand how this can work.  The error amplifier is internally configured like this (courtesy of onsemi datasheet):



Question 1: Why are we tying the output and negative input pins of the opamp together with a resistor?  That makes a weird circuit that sometimes passes your signal through (with some DC offset, depending on the current source & resistor size) and sometimes does inversion (would probably make something blow up).  It's not the normal unity buffer opamp circuit you're used to, the + and - inputs are swapped. 

Wouldn't a better way to disable the error amplifier be to tie the negative input to a low voltage?  Then it never sinks current and you can inject your feedback in through the COMP pin (after buffering it with something that can sink current).

(I say "a low voltage" because no-one documents the common mode input range of the error opamp, so putting 2.2V in might safer than 0V)

Question 2: Wouldn't it instead be better to fix the error amplifier output at 2.5V (short the FB and comp pins), then mix the feedback into the current sense pin?  Exactly how the same document claims is done for the superior UCC3809 chip they're trying to talk up?  As they show in this diagram (edit: note that the 'FB' pin is really the current sense pin on this different chip):

[Whales]

To elaborate on me calling the error opamp configuration weird, see attached simulations with a few different resistor values.  Blue = input, red = output.

[Picuino]

It is best to use 10k resistor in R2. 1k resistor have too low a value.

[Picuino]

Question 2: Wouldn't it instead be better to fix the error amplifier output at 2.5V (short the FB and comp pins), then mix the feedback into the current sense pin?  Exactly how the same document claims is done for the superior UCC3809 chip they're trying to talk up?  As they show in this diagram:

The circuit diagram creates a voltage “error” signal that serves as a reference for the next feedback loop, which sets the peak current. It has two feedback loops.
The peak current feedback in the inductance is very fast and responds every cycle. The voltage feedback is slower and sets the output voltage. This allows control of both magnitudes.

[Whales]

Hey Picuino,

It is best to use 10k resistor in R2. 1k resistor have too low a value.

Wouldn't this turn it into an inverting amplifier centered on 2.5V?  I would have thought this very undesirable as it would invert the outer feedback loop behaviour, creating positive feedback instead of negative.  This would probably prevent the power supply ever starting up (or make it go bang, depending on its initial state).

Question 2: Wouldn't it instead be better to fix the error amplifier output at 2.5V (short the FB and comp pins), then mix the feedback into the current sense pin?  Exactly how the same document claims is done for the superior UCC3809 chip they're trying to talk up?  As they show in this diagram:

The circuit diagram creates a voltage “error” signal that serves as a reference for the next feedback loop, which sets the peak current. It has two feedback loops.
The peak current feedback in the inductance is very fast and responds every cycle. The voltage feedback is slower and sets the output voltage. This allows control of both magnitudes.

You're thinking of how a UC3842 is normally used.  Normally the inner/fast/peakcurrent loop and the outer/slow/voltage loop are both handled on-chip. 

The Unitrode DN-89 document talks about disabling/bypassing the outer loop's error amplifier in the chip and instead replacing it with an error amplifier on the secondary side of the circuit.  I believe the motivation of this is to avoid having two error amplifiers in the outer loop (one inside the chip + one TL431 the secondary side) to make stability analysis simpler.

My question 2 refers to the way the UCC3809 (not 3842) is used in Diagram 3.  I was wondering if it's also possible to do the same with a 3842.  I think you might loose some gain in the inner peak-current loop (because of resistor summing/averaging the two control signals), but I wonder if it would otherwise work fine.

[Whales]

Ahah, here is a reference design doing it the way I thought would be better.  Disable the error amplifier by holding the FB pin to a voltage below 2.5V (in this case GND), replace it with an error amplifier on the secondary side (TL431), then feed the feedback signal in through the COMP pin instead (bypassing the in-built error amplifier):

https://www.arrow.com/en/reference-designs/19v-ac-to-dc-single-output-power-supply/f1a64b618e0a29264d37695cf97d0865acc9221487

(also attached in case it goes missing)

I think this means that Unitrode DN-89 could just be straight up wrong.

[Picuino]

The previous application note from Unitrode does not even have values for the resistors, and I certainly do not see how it is disabling the error (voltage) amplifier.

This latest design does have the voltage amplifier disabled, but it is replaced, as you mention, by the phototransistor and the TL431.
What is the question about this new circuit?


Edit:

I think this means that Unitrode DN-89 could just be straight up wrong.

I agree. Or perhaps they have not explained themselves clearly enough for us to understand them.

[Whales]

Ty for your thoughts Picuino

After some further thinking: DN-89 Figure 1 might be right even if the UC3842's in-built opamp is wired as an inverting amplifier. 



If you look closely at the error opamp on the secondary it is also inverted (+ and - pins are swapped compared to what I expected, can't possibly be done with a TL431).  This means the control loop now has 2 inverters in series (cancelling out).

I am worried how such a circuit would start up, however.  The optocoupler needs to turn on to raise the duty cycle, but if the secondary side is 0V then it can't possibly turn on.  Maybe this circuit has a minimum duty cycle?  Or the soft-start circuitry also forces a start?


> What is the question about this new circuit?

I do not have any questions about the Arrow and8327 schematic.

I am still interested in Q2 of my original post, however.

[max.wwwang]

Question 1: Why are we tying the output and negative input pins of the opamp together with a resistor?  That makes a weird circuit that sometimes passes your signal through (with some DC offset, depending on the current source & resistor size) and sometimes does inversion (would probably make something blow up).  It's not the normal unity buffer opamp circuit you're used to, the + and - inputs are swapped. 

If I understand you correctly, to respond to your question "Why are we tying the output and negative input pins of the opamp together with a resistor?", to me it's simply completing the negative feedback loop for the E/A, just as the IC is designed to offer this, and only this, flexibility (in relation to voltage feedback) to its user. If we have these components, R_COMP, R_VFB, etc., superimposed on top of the block diagram, it makes more sense (just like this one).

[max.wwwang]

To elaborate on me calling the error opamp configuration weird, see attached simulations with a few different resistor values.  Blue = input, red = output.

I'm confused here. The circuit your are simulating is not the same topology of the one in the OP. There the feedback (inside the IC) is hooked up directly with the output of the E/A, not via a diode as in your simulation.

[magic]

Necro.

In case the OP still cares, the first circuit uses the internal opamp as a transimpedance amplifier. Initially COMP is at 2.5V resulting in maximum duty cycle, later COMP decreases proportionally to current sourced by the optocoupler when the secondary achieves regulation.

[mtwieg]

I think the OP's first question was ultimately resolved. The app note isn't wrong (the figure 1 schematic does give proper negative feedback), but it is somewhat confusing. The app note says the internal error amp is configured for "unity gain" which IMO suggests it's a buffer with gain=1, but it's actually an inverting amplifier with gain=-1 (when Rcomp = Rvfb).

In case the OP still cares, the first circuit uses the internal opamp as a transimpedance amplifier. Initially COMP is at 2.5V resulting in maximum duty cycle, later COMP decreases proportionally to current sourced by the optocoupler when the secondary achieves regulation.

Yeah I like viewing it as a TIA as well. The fact that Rvfb is in series with the phototransistor makes it look very odd though.

As to the OP's second question:

Question 2: Wouldn't it instead be better to fix the error amplifier output at 2.5V (short the FB and comp pins), then mix the feedback into the current sense pin?  Exactly how the same document claims is done for the superior UCC3809 chip they're trying to talk up?  As they show in this diagram (edit: note that the 'FB' pin is really the current sense pin on this different chip)

I wonder if this is exactly what they are trying to show in the fig 1 schematic with the optional short circuit across Rcomp. In that case, the internal EA will try to drive COMP to 2.5V. An external driver could then override the COMP pin (only up to 2.5V though). However in the fig 1 schematic, this wouldn't actually happen, as the phototransistor can only try to pull COMP higher, so the feedback loop wouldn't work.

[max.wwwang]

Necro.

In case the OP still cares, the first circuit uses the internal opamp as a transimpedance amplifier. Initially COMP is at 2.5V resulting in maximum duty cycle, later COMP decreases proportionally to current sourced by the optocoupler when the secondary achieves regulation.

That’s exactly how I think it works, though I don’t know what a trans impedance amp is. 

[Whales]

There the feedback (inside the IC) is hooked up directly with the output of the E/A, not via a diode as in your simulation.

I used a diode on the output of the spice opamp to simulate a sink-only opamp output.

[max.wwwang]

There the feedback (inside the IC) is hooked up directly with the output of the E/A, not via a diode as in your simulation.

I used a diode on the output of the spice opamp to simulate a sink-only opamp output.

I see. 

[magic]

though I don’t know what a trans impedance amp is

Usually it's exactly this opamp circuit here, though other implementations are possible too.
You can look this name up.

impedance - relation between voltage and current
transimpedance - relation between voltage and current in different places (output, input)
TIA - an amplifier which converts input current waveform into output voltage waveform

[max.wwwang]

TIA - an amplifier which converts input current waveform into output voltage waveform

If that simple (looks like it is!), why such a pretentious name!  Sure I will look it up. Thanks.