Hello, I'd like to post an update. Working on this project from time to time, I've come up with a circuit which i have partially realized and tested.
I'd be really glad to receive any observation or tips to improve my design, thank you!
VCC is 5V. Basically I have a VCO made by charging and discharging a capacitor feeding a schmitt trigger. The capacitor is always discharged with a constant current controlled by the control voltage and the trigger enables fast charge when the capacitor drops below the low threshold. Not yet sure how to generate the control voltage, if the mcu is fast enough i can go with PWM.
the schmitt trigger output is buffered to drive the primary coil and a band pass filter is used to measure the current through the coil in the range 14-25MHz (where my 12 resonant frequencies will be). The filter removes the second harmonic of the first frequency at around 30MHz pretty well.
I designed the filter with an online tool and montecarlo simulated with 1% tolerance on the components to make sure it isn't too sensitive (I only tested the VCO though as I'm waiting to receive the board and filter components)
I also simulated a frequency sweep to see the circuit response to all the pieces with various coupling factors (even as low as 0.1), as seen in the attached pic.
This shows that it's probably enough to compare Vmeas with something like 4V to have a safe 1 or 0 but I'm still going to use the ADC of the mcu and pick the frequency with the highest value to decide which piece is on that cell, just to be on the safe side.
I didn't distribute evenly the frequencies as it appears higher ones have a lower quality factor for some reason.. I wonder why, I would have guessed otherwise, as the impedance of the inductors grows larger than their resistive losses as the frequency increases...
edit: to clarify the meaning of the picture, it's a transient simulation with a frequency sweep between 15 and 24MHz, and each curve is done with a different piece coupled to the primary to see how much the pieces aver overlapped in frequency (the very first frequency is a little unlucky as ithappens while the circuit is "booting", but you get the idea)
edit: so I have already managed to improve Vmeas quite a bit. Obviously the envelope detector capacitor was way too small, don't even remember how i picked it, I guess It just stuck there.. also the final npn stage didn' t need an emitter resistor as it is really just a switch, not an amplifier, and also was burdening too much the capacitor so I increased the collector resistor. Now the simulation is much better, the ripple is gone and the frequencies don't even overlap at the sampling point