Crazy idea? Making a PWM controller without a microcontroller? Possible?

[MarkS]

In my never ending quest to make retro computer stuff, I'm designing a simple robotics platform with a MC68000 processor (yes, I'm obsessed with this part!). I need two PWM signals to the motor controllers and common sense tells me to integrate a small microcontroller for this purpose. However, when I say "retro", I really want to mean retro, i.e., any component available pre-1990's. This led me down a rabbit hole of how to design a PWM controller without a microcontroller. Unfortunately for me, I'm at a loss here, so I'll be going the microcontroller route.

STILL....

How could this be done? CAN it be done? I want to take an 8-bit binary signal in parallel and output an appropriate PWM pulse. I'm thinking 8-bit binary to 256-bit sequential string. So, (input)00000001 would be ...(256 total positions)...000001, 00000100 = ...001111, 00001000 = ...11111111, etc. The sequential bit string would then be shifted at a currently undefined clock frequency, creating the PWM signal. Sounds SOOO easy!

My initial thought was to store the sequences in an EEPROM and use the 8-bit binary string as the address along with additional logic to fill 32 parallel-in, serial-out shift registers connected in sequence. And while I think I can make this work, that's over 32 chips... PER channel! I looked at the 74HC40103, and it initially looked promising, but it counts down to zero at a high state (good!), outputs a single low clock pulse and then goes back high to begin the count again (bad).

Is this a total waste of time, even for the edutainment value, or is there a way to do this?

[Tomorokoshi]

A non-optimal, brute-force block-diagram way would be something like:

1. Have an 8-bit counter that cycles from 0 to 255 then back to 0 to generate a ramp. It drives a DAC with an appropriate op-amp.

2. Have a PWM level set by an 8-bit output register that drives a similar DAC and op-amp circuit.

3. Then a comparator drives the output signal.

The ramp wave is compared to the setpoint. When the threshold is reached the comparator changes state. The polarity is set by either the selection of inputs to the comparator, or the counting direction of the ramp. You could use a multiplexed DAC for multiple channels using the same ramp.

Or are you looking for a digital-only solution?

[themadhippy]

8 relays hanging off your parallel bus switching in and out resistors to set the timing on a 555

[hatte]

Could you hack an I2C implementation and use something like PCA9685 (16 channel, 12 bit PWM controller) to maintain the PWM signals without requiring any intervention by the CPU.

Adafruit has a board with the PCA9685 https://www.adafruit.com/product/815

[iMo]

You may do PWM control of "something" with 2 transistors - a multivibrator - where you are changing the duty cycle with a potentiometer.. Pretty retro, imho

[ejeffrey]

Take a free running 8 bit counter and an 8 bit full adder. Add the counter output to your control word. The carry output of the adder is your PWM signal.  That's 3-4 chips.

[Bud]

R2R ladder DAC -> NE555 timer

[Benta]

Hahahaha!
Pre-1990, practically no one would use an MCU for this (far too expensive), nor do it digitally.
It was a linear ramp/triangular generator followowed by a comparator. PWM level controlled by a DC input voltage.
https://www.analog.com/en/design-notes/pulsewidth-modulator-operates-at-various-levels-of-frequency-and-power.html

[PCB.Wiz]

My initial thought was to store the sequences in an EEPROM and use the 8-bit binary string as the address along with additional logic to fill 32 parallel-in, serial-out shift registers connected in sequence. And while I think I can make this work, that's over 32 chips... PER channel!

I looked at the 74HC40103, and it initially looked promising, but it counts down to zero at a high state (good!), outputs a single low clock pulse and then goes back high to begin the count again (bad).

Is this a total waste of time, even for the edutainment value, or is there a way to do this?

In reverse order :
Yes, it is very close to a total waste of time, even for the edutainment value.

The 40103 is actually doing most of what you need, it provides a 8 bit to clock-time delay, you just need another /256 reference and a flip flop

This led me down a rabbit hole of how to design a PWM controller without a microcontroller. Unfortunately for me, I'm at a loss here, so I'll be going the microcontroller route.

Yup, the problem you have in 2023, is that the microcontroller is cheaper than the TTL LOGIC you might choose, even before you add in Board area and assembly time adders.

[jpanhalt]

Here are some links that may be helpful:

https://www.4qdtec.com/pwm-01.html
https://www.4qdtec.com/

Single chip voltage controlled (obsolete?):
https://www.ti.com/lit/an/slit110/slit110.pdf?ts=1688810617464&ref_url=https%253A%252F%252Fwww.google.com%252F

[AndyBeez]

Left field - but retro - I thought old skool micros have sound chips? Could you 'hack' one of those in it's pulse oscillator mode, to yield a variable mark space ratio for your PWM-like output? You'll only get up to 5KHz at best though.

Otherwise... a DAC creating a voltage, and then a voltage to PWM converter.

[Nominal Animal]

Take a free running 8 bit counter and an 8 bit full adder. Add the counter output to your control word. The carry output of the adder is your PWM signal.  That's 3-4 chips.

Replace the counter with a latch, so that each cycle i you calculate A_i+1 = A_i + C, and you have a PDM, i.e. pulse density modulator.

If A is 8-bit, and you limit C to between 16 and 239, inclusive, you will always have at least one edge every 16 clock cycles, which makes it much easier to low-pass filter such a signal analogically.  PWM-controlled devices like servos don't like a PDM signal, though.


Here is what I would do:

Two binary counters, with a carry/overflow output, and a register/latch each to store the count to reset to.
One counter counts the output high period, and the other the output low period.
With 8-bit binary counters, you can control the PWM frequency (as one period can be from 2 to 510 cycles).
Whenever one counter carries/overflows, the output is toggled, this counter reset to its period, and the other counter enabled.
Only one counter runs at any time.

So, two counters, two registers/latches to store the two periods, an SR flip-flop to select which clock handles the next clock pulse, and another SR flip-flop to toggle the output.

If you add a third counter and register/latch, you can make it the clock divisor D, so that the PWM period is (H+L)×D clock cycles, and duty is H/(H + L).  With 8-bit counters and a 2 MHz clock, you can then select the PWM frequency between 15.38 Hz and 1 MHz.  Between 15.38 Hz and 3921 Hz the resolution is maximum possible.

SN74HC590 seems eminently suitable as an 8-bit counter, because it has a separate clock enable (CCKEN), and a register carry output (RCO), and is still easily available.  The latches need separate output enables, so SN74HC573 seems suitable.  For the latches, a CD4043 has four S/R latches, and seems well suited.


Since OP wants a robotic platform, they probably need many PWM channels, but all channels can probably use the same PWM frequency.

It seems to me that a free-running 8-bit counter, with its overflow resetting all output channels would work.
Each channel has a binary comparator and a S/R latch.

Add an extra binary counter to divide the clock source for frequency adjust.  From a 2 MHz clock, an 8-bit divider yields 8-bit PWM frequencies between 30.6 Hz and 7812.5 Hz.

I think SN74HC590 is old enough for the counter(s), CD4043 for the SR flip-flops (4 outputs per chip), SN74F521 for the comparators, and SN74HC573 for the binary registers/latches.  So, it's a minimum of 2.25 chips ('521 + '573 plus one fourth of a CD4043) per channel, plus one or two '590 counters.

I am not sure how to interface the binary registers/latches to the 68k bus, though, to set the duty cycle for each PWM channel.
Which leads me to: why not implement the 68000 architecture as a soft-core on an FPGA?

[MarkS]

Which leads me to: why not implement the 68000 architecture as a soft-core on an FPGA?

Fair question! I have two working 68K chips at my disposal. Why reinvent the wheel when you have two taking up precious space?

[SiliconWizard]

Two counters looks like a simple arrangement.
Note that there still are some logic ICs available with a dual counter inside, so could be done with one chip only.
For instance the SN74LV8154 (dual 16-bit counter). There probably are dual 8-bit versions out there.

[MK14]

MC68000 processor

Because it can access the even older, M6800 peripherals.

Figure 10-6. MC68000 to M6800 Peripheral Timing Diagram

https://www.nxp.com/docs/en/reference-manual/MC68000UM.pdf

and it hence fulfils your requirement:

really want to mean retro, i.e., any component available pre-1990's.

Hence, the MC6840 (is my suggestion), which can do PWMs.

At a quick glance, it seems to be able to provide up to three PWM outputs.

https://colorcomputerarchive.com/repo/Documents/Datasheets/MC6840%20Programmable%20Timer%20Module%20(Motorola).pdf

Which may have been the way, a real engineer from pre-1990's would have done the PWMs.

[Nominal Animal]

Hence, the MC6840 (is my suggestion), which can do PWMs.

Oo, I didn't even know those existed back then.  (I never had a 68k-based computer myself.)

Since MC6840 is probably unobtainium right now – although I do see variants on offer at eBay! –, maybe use a small FPGA, perhaps the open-source programmable iCE40HX1K FPGA (see Olimex' EVB; Mouser re-sells them if you don't want to buy directly from Olimex), to emulate a set of MC6840's? You may need a bi-directional level shifter (the kind with direction selection pin work best IMO), though, or just use the Olimex iCE40-DIO module.

Add O4-O15, /C4-/C15, /G4-/G15, and a few additional RS (register select address) pins, maybe change the register address map a tiny bit (each has three registers, so I'd map the two LSB to select the register, and RS2-RS5 to select the PWM channel), to make a "chip" that behaves very much like five MC6840's in parallel, for 15 PWM channels?

The logic for the FPGA is quite straightforward, so even a small FPGA suffices.  I point out these particular FPGAs only because they don't require any proprietary or commercial tools to program, so no "hidden" or extra costs, if one goes this route.
Sure, it is not original silicon, but if one had enough money back then, it is something that would have been achievable since the 3-channel one is known to have existed back then.

[MK14]

Since MC6840 is probably unobtainium right now – although I do see variants on offer at eBay!

Best to get it from a RELIABLE source.  Such as someone from the US, who has great feedback (Ebay) or selling it on this forum, and has some lying around, as NOS (new old stock).

The China sourced ones (although they can be very cheap), are a much riskier option.

[MarkS]

https://www.ebay.com/itm/265811742119

[MK14]

https://www.ebay.com/itm/265811742119

Yes, that is exactly the sort of much more reliable (looking, but best to still be careful) seller, with apparently/claimed new old stock, availability.

Their other ebay sales items, seems to indicate they are a genuine US seller, with genuine items.  As they seem to be selling a number of Heathkit items, such as:
"Vintage Heathkit Catalog May 1966":
https://www.ebay.com/itm/266323498513

[PCB.Wiz]

Two counters looks like a simple arrangement.
Note that there still are some logic ICs available with a dual counter inside, so could be done with one chip only.
For instance the SN74LV8154 (dual 16-bit counter). There probably are dual 8-bit versions out there.

However, the SN74LV8154 (and HC590 someone else suggested), fail as PWM devices, because their counters are READ path only, there is no WRITE path to the counter.

[DiTBho]

Which leads me to: why not implement the 68000 architecture as a soft-core on an FPGA?

the 68000 is a very complex CISC CPU and takes a lot of LE when you try to implement it on FPGAs.
Modern FPGAs have enough resources nowadays, but the complexity is very high.

I wouldn't reccomend it.

[DiTBho]

years ago I implemented a "digital resistor" device with a latch and a network of resitors.
with one/two digital resistors you can modify the dutycycle of a NE555 PWM circuit.

Code: [Select]

.                         ______________
.                        |   dutycycle  |
.                    ____|___        ___|____
.                   |        |      |        |
.8bit --- latch ----| digital|      | NE555  |
./ce -------x       |resistor|      |        -------- PWM
.                   |________|      |________|
.                        |______________|
.

some problems:
- NE555 needs thermal compensation to avoid frequency drift
- the best I was able to obtain was dutycycle from 1% to 99%
- there are glitches when send a new value to the latch and it changes the configuration of the R-network
- it takes a lot or resitors, which may be 1-5% of tollerance, so ... expensive
- the capacitor of the "RC" cell must be low tollerance and very low ESR
- the R-network is never perfectly balanced, so the resistence seen by NE555 is never exactly linear/8bit set

[Nominal Animal]

Two counters looks like a simple arrangement.
Note that there still are some logic ICs available with a dual counter inside, so could be done with one chip only.
For instance the SN74LV8154 (dual 16-bit counter). There probably are dual 8-bit versions out there.

However, the SN74LV8154 (and HC590 someone else suggested), fail as PWM devices, because their counters are READ path only, there is no WRITE path to the counter.

I suggested SN74HC590, because in the multiple-PWM-channels mode it runs continuously, and in frequency divisor mode it always starts at zero, and is reset to zero at comparator match.

(In the dual counter mode, indeed, each counter would require a separate comparator as well, to reset and disable the current counter and enable the other.)

The 74HC40103 OP mentioned is loaded to a specific value, and then decrements to zero, with the carry, /TC, asserted for a single cycle when the outputs are all zero.

[vk6zgo]

Hardly crazy, or impossible!

Pre-microcontrollers it was done for a while with a "bog standard" microprocessor & a bunch of peripherals, & before that, using various combinations of discrete or semi-integrated devices.
Some devices were "specials" made for just such applications, fairly costly, & not mainstream.

If the Military needed such a control, they just "threw money at it".
Even some "well heeled" (or fanatical) Aeromodellers used PWM controls back in the early 1960s, made up with discrete PNP germanium devices like OC44s, OC72s, etc.

[Nominal Animal]

If the Military needed such a control, they just "threw money at it".

Hm.. Since there were/are radiation hardened versions of MC68000, how likely/unlikely it is that the military actually developed a radiation hardened multi-channel version of MC6840 PWM peripheral?  Especially if they experimented with satellite robotics?  With ceramic bearings and a bit of research into the effects of radiation exposure on various coil lacquers, which probably was done anyways early in the space race, you'd have most of what you need.

There being three channels in MC6840 itself is interesting, being sufficient for direction and zoom control.  Did spy satellites use gimbal cameras with zoom optics?

Interesting stuff, anyway