Dundarave, thank you for that article.
KE5FX must be proud to read that his Teensy 4 is dubbed a "dedicated supercomputer". Heck, I still have vivid memories of probing the brains of people who had actually worked with Crays, discussing the nifty tricks Seamour was pulling to achieve that performance by a piece of furniture. Talk about "couch computing".
For a some time I even doubted that a 74LS00 quad-NAND could function correctly in that place. Since its gate D functions as the power-up reset, the possible replacements from the 74-family are quite restricted. A 74LS86 quad-XOR wouldn't yield any useful function.
James_s, I didn't really believe in a more eleborate obfuscation, since the existing circuitry seemed sufficient for the task, albeit arranged a bit different from what I would have done. It wouldn't make any economic sense either, since the "magic chip" itself would have served as a copy protection (Sinclair ZX Spectrum ULA comes to mind).
When I got the timing information for MC14069 gate E/D and C, and compared that to the voice samples, I wouldn't believe that those timings could be made to fit. However, starting at about 200Hz input frequency, we will actually start to see pulse trains on JK_CLOCK. See "200Hz.png".
The audio sample "praat_right_US_male.png" wouldn't yield the three clocks required for the JK-FF's to go to state 3. However, a longer drawn out version of that command will.
We can now infer the function of the MC14024N and its reset oscillator. That oscillator, composed of MC14069 gate A/B, generates a symmetric 15ms signal. MC14024N-Q7 causes pulses on JK_CLEAR for an average input frequency of
853Hz 426Hz and above. However, those JK_CLEAR pulses are gated by JK_CLOCK in two ways:
- directly via 74LS00 gate C
- indirecty by suppression of TONE_CLOCK via D2
This means that as soon as the MC14069 gate A/B/C block is fed MFBP2_PULSE's via C9, the JK_CLEAR generation is pretty much blocked.
Now that the basics are figured out, it is only a matter of training the operator to stress and stretch those commands in a way that fits our circuit. A process that should be completed quite intuitively. This fits with the instructions given in the article about the VCP200 (Commands/Pronunciation table).
I'd love to see/hear that circuit being handled by an "American native speaker" operator. *hint*
epitaxal, if you could find the time to check the schematic against the PCB and fill me in on the missing values, that would give us some closure. Thanks for sharing all those pictures.
edit2211291357: made some typos in the schematic regarding reset oscillator: must be 15ms and 426Hz for I_DETECT generation.