Author Topic: De-capping & circuit analysis of hybrid modules  (Read 10438 times)

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Offline magic

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Re: De-capping & circuit analysis of hybrid modules
« Reply #50 on: August 05, 2025, 04:06:09 pm »
US patent 4,969,823 filed by Analog Devices in 1988 describes a junction isolated complementary bipolar process with N-doped substrate biased to V+ and P-doped epitaxial layer and wells for NPN transistors.



Possibly another hint that this is an AD chip. But AFAIK by the 1990s all big players in high end analog (AD, LT, TI, NS) had some sort of complementary bipolar processes and I don't know them all and how to tell them apart.

edit
Wait, the image above doesn't show separate wells for NPNs. Either it's some other process or maybe it needs those local connections for some reason. Two metal layers aren't making it easy, but I will see if I can figure out this circuitry and which transistors are which polarity.

edit edit
Actually, nothing stops them from running N isolations between NPNs and cutting that P-epi into fragments, for whatever reason.
« Last Edit: August 07, 2025, 06:46:29 pm by magic »
 

Offline D StraneyTopic starter

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Re: De-capping & circuit analysis of hybrid modules
« Reply #51 on: August 05, 2025, 07:27:47 pm »
Good luck!  You have more patience than me, the dual overlapping metal layers are such a pain - I started trying to follow the connections on the AD586 but had to give up  :)

Also while finishing up checks on another hybrid, I just ran across an LTC1050, which also has a positive substrate bias in-circuit.  Maybe there's something to be learned by comparing the LTC1050 with the mystery quad op-amp.

Offline Conrad Hoffman

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Re: De-capping & circuit analysis of hybrid modules
« Reply #52 on: August 05, 2025, 07:37:10 pm »
I have a question you guys might have some insight on. When I use something like a DRV8837 bridge motor driver, it has a metal pad in the center used for heat dissipation. This is supposed to be soldered to a ground plane. They never say much about it electrically, but I assume it's the actual metal carrier for the die. What might one expect if it were tied to Vcc or even a voltage below ground? Can the silicon be considered a good insulator? Or would there even be a general rule?
 

Offline JohnG

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Re: De-capping & circuit analysis of hybrid modules
« Reply #53 on: August 05, 2025, 07:54:54 pm »
Unless the documentation says otherwise, it is safest to assume that the die is soldered to the metal pad, i.e. the pad is connected to the substrate. For the majority of parts, this would be connected to the most negative supply for the IC.

This pad connection should really should be specified in the datasheet.

John
"Reality is that which, when you quit believing in it, doesn't go away." Philip K. Dick (RIP).
 
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Offline D StraneyTopic starter

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Re: De-capping & circuit analysis of hybrid modules
« Reply #54 on: August 05, 2025, 08:12:06 pm »
If it is connected to the silicon substrate (safe to assume as JohnG said), then what would happen if you connected it to Vcc (or any voltage more positive than Gnd) is that it would forward-bias some or all of the parasitic diodes between the substrate and the various transistors & wells internally, and do all kinds of wacky shit including almost definitely frying the chip.  You might get away with connecting it to something more negative than gnd, but depends on the breakdown voltages, what your supply voltage is compared to the max ratings, etc.

Anyways, back to hybrids and/or mystery op-amps...
 
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Offline magic

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Re: De-capping & circuit analysis of hybrid modules
« Reply #55 on: August 05, 2025, 08:32:41 pm »
Good luck!  You have more patience than me, the dual overlapping metal layers are such a pain - I started trying to follow the connections on the AD586 but had to give up  :)
It's annoying, but I have done AD587 and AD588 in the past, there are full schematics somewhere on this forum. Not sure if I will manage 100% of your opamp, but so far it looks like the input stage is an H-bridge - two diamond buffers driving two ends of a resistor and their collector currents make the output of the input stage. That probably goes to some current mirrors and a unity gain output stage, like in current feedback amplifiers, but not sure yet. Whatever it is, it was likely advertised as a quad high-speed, high slew rate voltage feedback opamp.

A little unexpected type for a thermocouple amplifier, but it was after the mux so they may have wanted speed to quickly scan through all those channels and the precision microvolt job is already done by those LT1012.

Also while finishing up checks on another hybrid, I just ran across an LTC1050, which also has a positive substrate bias in-circuit.  Maybe there's something to be learned by comparing the LTC1050 with the mystery quad op-amp.
That's CMOS, a different technology. It can be done either way (keywords: "N-well" or "P-well"), though P-well (N substrate biased to V+) seems more common in analog for whatever reasons.

I have a question you guys might have some insight on. When I use something like a DRV8837 bridge motor driver, it has a metal pad in the center used for heat dissipation. This is supposed to be soldered to a ground plane. They never say much about it electrically, but I assume it's the actual metal carrier for the die. What might one expect if it were tied to Vcc or even a voltage below ground? Can the silicon be considered a good insulator? Or would there even be a general rule?
Doped silicon is not an insulator at all and the substrate (the bulk of the die) is often connected internally to GND or one supply rail or another, so soldering it to a different rail will do nothing good. Sometimes the datasheet says that the pad is floating, but even then GND may be a good idea for EMI reasons.
 
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Offline D StraneyTopic starter

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Re: De-capping & circuit analysis of hybrid modules
« Reply #56 on: August 06, 2025, 04:14:19 am »
Ahh CMOS, ok, that's what I get for being lazy and not bothering to read the datasheet.  I'm not good enough at this to tell apart weird-bipolar from CMOS unless there's some super obvious interdigitated gate structures.

Anyways, speaking of the LTC1050, this additional hybrid ended up being unexpectedly simple, so in a 2-for-1 deal, here's...
BI 34090218 mystery module
Outside:

Inside:


The IC at the left is an LTC1050 op-amp - the whole right third is taken up by the compensation capacitor:


The IC at the right is a PMI SW-201 or SW-202 quad analog switch:


The two large rectangles in the middle are resistors, covered with polyimide.  Luckily, the coaxial lighting on the microscope penetrates right through that, and we can get a good look at the resistive traces:

At first I was wondering where the damage on the left edge came from, and then realized it's a rough-looking form of resistance trimming.  If you look carefully, you can see some smaller "bypass" paths in between the numbers on the left edge, some of which get cut to increase the resistance slightly.

There's not a lot of circuitry in there, so tracing it was surprisingly quick:


The op-amp forms an integrator (with the ceramic cap visible on the inside, at the far left), which has many possible inputs on different pins, selectable with the analog switch.  I'm not sure what R5 and R6 are doing (the two large polyimide-covered resistors) with their low values: is this supposed to serve as the low side of an external voltage divider?  A current-to-voltage conversion for an external current source?

Overall, the only thing I can think of is that this looks like part of a multi-slope ADC, where various reference and input voltages are integrated sequentially.  However, it's also possible that there's supposed to be a DC feedback resistor(s?) added externally, such as between pins 3 and 13, and it has a more general-purpose use.  This falls into the category, like some of the TRT hybrids earlier in the thread, where the circuit is application-specific enough to not be an obvious general-purpose building block, but not application-specific enough to be obvious where it's meant to be used.

The op-amp is given an internally-regulated supply voltage that's lower than what the analog switch sees.  Here's what R3 & R4, the series power supply resistors, look like:


This is R1, the input-bias-current-balancing resistor:


...and this is R2, the inverting-input resistor pair:


The last interesting thing I noticed is that the diodes used to clamp the op-amp's inverting input look a bit unusual.  There's two bond pads used but they both connect to the same place: maybe a dual diode, with both connected in parallel here.  Can't recognize a Schottky or other special diode structures off the top of my head, but maybe someone else does?
« Last Edit: August 06, 2025, 04:29:07 am by D Straney »
 
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Offline Conrad Hoffman

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Re: De-capping & circuit analysis of hybrid modules
« Reply #57 on: August 06, 2025, 04:36:04 pm »
Is BI Beckman and did that go in a meter or some piece of measurement equipment?
 

Offline D StraneyTopic starter

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Re: De-capping & circuit analysis of hybrid modules
« Reply #58 on: August 06, 2025, 06:03:11 pm »
Good question - I only know them as TT/BI, for resistor arrays and trimmers that I sometimes use in designs.  Looks like you're right and "BI" stands for "Beckman Industrial": https://www.ttelectronics.com/products/passive-components/resistors/heritage/
No idea about end-use, as I got it as NOS.  The metal encapsulation and everything is a bit more than it would need even for high-end test equipment, so my best guess is aerospace/military/heavy-industrial.

Edit:
Wait, here's a datasheet for BI's line of "military-grade hybrid microcircuits".  I guess their own part number is the 165-1766-0, and the "165" is their custom hybrid series: https://www.alldatasheet.com/datasheet-pdf/pdf/850180/BITECH/165.html
« Last Edit: August 06, 2025, 06:06:10 pm by D Straney »
 

Offline magic

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Re: De-capping & circuit analysis of hybrid modules
« Reply #59 on: August 07, 2025, 09:39:28 am »
The quad opamp is interesting. The two layers of metal and general appearance are similar to AD586, but there is no AD logo and I failed to find any match in the 1992 amplifier databook.

Well, I must be going blind, because it's right there in this exact book :palm:
 
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Offline D StraneyTopic starter

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Re: De-capping & circuit analysis of hybrid modules
« Reply #60 on: January 21, 2026, 04:58:51 am »
MIL-STD-1553 Transceivers, Part 1: National Hybrid NHI-1544FP
Something that I've encountered a lot in looking at older aerospace electronics is the MIL-STD-1553 serial interface.  This was meant as a standard way for avionics to talk to each other - the military and space equivalent of ARINC 429 on airliners.  The higher-level protocol gets somewhat complex with broadcast vs. point-to-point messages, bus controllers, etc., but the physical layer is straightforward.  It uses bipolar differential signalling on a twisted pair, AC-coupled through a transformer to remove any DC grounding issues (Manchester encoding is used to make the AC-coupled pulses timing-dependent rather than level-dependent).

There are a few hybrid modules from different manufacturers which contain an entire physical-layer transmitter and receiver, minus the transformer - the digital transmitter-inputs and receiver-outputs from these are then connected to controllers which handle the higher-level communications protocol.  The pinout seems to be a de facto standard, so this makes a great opportunity for comparing a couple different functionally-equivalent modules side by side, to see how different engineers went about solving the same problems differently!

The first one we're looking at is from National Hybrid:


We can see that it's fairly complicated inside, with a lot of different parts:



The ICs inside are all "generic building block" parts:


74LS00 quad 2-input NAND gate


74LS10 triple 3-input NAND gate


74LS26B quad 2-input NAND gate, open-collector outputs


Op-amp of some kind (2 copies)


LM117 adjustable 1A linear regulator


TL431 2.5V shunt voltage reference


LT119 dual fast comparator (photo from a different module of mine)


...plus a couple copies of trimmed resistors that are interesting-looking, and 2 of the power transistors:



For the circuitry, let's look at the receive side first, as it's the simplest:

There are two power supplies: Vcc is +12-15V, and Vee is -12-15V.
  • The differential inputs enter at the left, go through series resistors for current-limiting, and have the differential voltage clamped to roughly +/- 1.5V by D5-D8.
  • Next, one op-amp in a classic difference-amplifier configuration (U5) converts the clamped differential input into a single-ended signal.
  • This signal is then fed through a 3-pole low-pass filter: first, a single-pole RC (R36 & C10), then a 2-pole Sallen-Key type (R37 onwards).  The Sallen-Key topology requires a voltage buffer, and so here a single discrete transistor (Q11) is used as an emitter follower.  This must be to filter out EMI-induced noise that could otherwise appear as false transitions.
  • The DC level shift introduced by this discrete-transistor buffer doesn't matter, as the signal is then AC-coupled through C13, and then fed to a pair of comparators (U6).  These compare against separate positive and negative thresholds for the differential input (remember that the input signal is bipolar), and produce 2 separate digital outputs.  The data rate is 1 Mbps, which translates to 1 µs per bit, and there can be up to 2 transitions in this time, because of the Manchester encoding - so the comparator has to be significantly faster than this to work correctly.  The LT119 is specified at an 80 ns delay.  I'm not sure exactly what D9 & D10 are for, on the comparator inputs, as comparator are normally meant to saturate the input transistors.  Their actual effect depends on the relative values of R40 vs. R42-R50.  The TL431 is used here to generate the negative threshold, and the linear regulator (discussed further in the transmit section) is used to generate the positive threshold.
  • Finally, a couple NAND gates are used to gate the two digital outputs based on a separate "Enable" ("Strobe") input.  There's also some inverters here made from NAND gates: the output pins can optionally be wirebonded to their outputs instead.  The reason for this seems to be different behaviors when the MIL-STD-1553 bus is idle (~0V differential).  According to a DDC datasheet, the "Smiths-compatible" transceivers put both (Rx Data) and !(Rx Data) high when there's no input, while the "Harris-compatible" transceivers put both (Rx Data) and !(Rx Data) low in the same situation.  Inverting both digital outputs (by bonding to U7B & U7C outputs) and swapping them is equivalent to changing between these two styles of idle-level outputs.  This makes it easy for National Hybrid to manufacture two models of transceivers, one for each "idle style", which are identical except for where a couple wirebonds are placed.

Next, the transmit section:

You can see here where the LM117 is used, to produce an internal supply of roughly 6.6V, which is used as a (not very accurate) reference point in a few places.

There's a lot going on here, so let's step through section-by-section:
  • Input logic: The mess of NAND gates here decodes 3 inputs - (Tx Data In), !(Tx Data In), and Tx Inhibit - and produces 3 outputs.  U1B & U1D produce complementary open-collector outputs that are used to modify analog setpoints downstream, and are never active at the same time.  U1C produces an "enable" output, which either powers on or powers off the output driver.  When both "Tx Data In" inputs are complementary, the output driver is enabled and its analog setpoint is modified accordingly.  When the "Tx Data In" inputs are either both high or both low (not a valid state for complementary inputs), the output driver is powered off.  The output driver is also powered off whenever the "Tx Inhibit" input is high.
  • Output voltage setpoint generator: A single op-amp is used here in a simple inverting or non-inverting configuration (depending on how you want to think about it), to generate the setpoint for the output voltage.
    • When the digital input data is low, U1B's output is low, and its open-collector output pulls the op-amp's "+" input to ground.  This forms an inverting amplifier, where the equivalent input voltage is Vaa (~ +6.6V), so the op-amp's output goes to a negative voltage.
    • When the digital input data is high, U1D's output is low, and its open-collector output pulls the intersection of R25 & R26 to ground.  This forms a non-inverting amplifier, where the equivalent input voltage is a scaled (by R19 & R29) copy of Vaa, so the op-amp's output goes to a positive voltage.
  • Filters: The output voltage setpoint goes through a 3-pole low-pass filter here, identical in structure to the 3-pole low-pass in the receive section.  As before, a single-pole RC filter is followed by a 2-pole Sallen-Key topology using a single emitter-follower transistor as the voltage buffer.  MIL-STD-1553 has specific specifications for slew rates of the outputs, which is probably for both EMI (less noise induced in adjacent cabling) and signal integrity (less issues with reflections in cabling stubs) reasons.  This filter likely determines the shape of the output transitions, and so makes the waveforms meet the target specifications.
  • Bias switch: When the output driver is supposed to be powered off, U1C's open-collector output is pulled to ground.  This turns off Q8, since the Q7-Q8 connection means that Q8's base needs to be about 2*Vbe above ground to turn on.  When the output driver is supposed to be powered on, R13 pulls up Q8's base, and allows Q8 to both turn on the common-emitter Q9 and common-base Q7 with the same collector/emitter current.  Q9 applies +6.6V to the left side of R17 & R17b, which supplies positive bias to the output driver's feedback circuitry, as we'll see soon.  Q7 turns on Q5, which switches negative bias (Vee) to the output driver as well.
  • Voltage amplifier & output driver: This part is the most complicated.  Because of the two differential outputs, there are two identical copies of the output driver - the second one is shown at the bottom-right of the schematic.
       
    • The simplest part is the class-AB power stage, made from Q1 and Q2.  The linear output stage, instead of just switches from Vcc & Vee, is needed here because of the defined transition shaping created by the earlier filter, and possibly smaller voltage levels as well?  Q1 & Q2 have their idle bias current set by the "Vbe multiplier" made from Q3, R5, and R6.
    • On the positive output driver, the voltage at the emitter of Q6 is set by the setpoint voltage.  "Bias1" sources current through R17, and Q6's base is at the voltage setpoint (filter output) + 2 * diode Vf (D3 & D4).  One of these diodes roughly compensates for the Vbe voltage drop in Q10, and the other for the Vbe voltage drop in Q6.  Therefore, Q6 acts like an emitter follower with its emitter voltage set to about the voltage setpoint from the op-amp & filter.
    • Q6's emitter behaves as a constant-voltage "virtual ground" summing point for a voltage amplification loop (like an op-amp's inverting input), formed by R8, R2, R2c, Q4, and R7.  Q6's emitter is fixed at the setpoint voltage, as just described.  R8 sinks current from this summing point, while R2 either sources or sinks a current into the summing point depending on the output voltage (this is just like the feedback resistor in an op-amp gain circuit).  R2c connects to the summing point of the negative output driver, and either sources or sinks current depending on the relative levels of the two summing points.  Any excess current from the sum of these various currents is then conducted through Q6's collector, and drives a current mirror (roughly 57:1, based on the resistor ratios) built from Q4.  The current mirror's output provides base current for Q1 and the Vbe multiplier, but more importantly creates a voltage drop across R7, which therefore sets the output voltage for the class-AB driver.  In this way, the "error current" through Q6 is amplified and used to control the output voltage, creating a negative feedback loop.
    • If the output voltage decreases, to keep the sum of summing-point currents equal to zero, more current must flow through Q6.  This increased Q6 current is mirrored and creates a larger voltage drop across R7, increasing the output voltage again and completing the feedback loop.
    • At this point, it's important to point out that the negative output driver's summing point is fixed at 0V, with D3b.  R2c, linking the two output drivers' summing nodes, is responsible for forcing the complementary output voltages.  When the voltage setpoint (from the filter) increases, the positive driver's summing point voltage follows it upwards as discussed earlier.  This puts a larger voltage across R2c, and sources more current into the negative driver's summing point.  To balance this extra current, the negative driver must decrease its output voltage, to increase the current sunk through its own R2b by an equal amount.  This is what creates the "balanced" output voltages, without directly feeding a copy of the setpoint to the negative output driver.
       
       Here's the equivalent circuit made from op-amps, if that makes it easier to understand:
       
       

Let me know if any parts of the explanation don't make sense.
« Last Edit: January 21, 2026, 05:00:34 am by D Straney »
 
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Offline magic

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Re: De-capping & circuit analysis of hybrid modules
« Reply #61 on: January 21, 2026, 06:38:47 am »
Op-amp of some kind (2 copies)

Looks like Harris complementary bipolar process and the chip is somewhat similar to this one, which I thought was a rebadged HA-2520, curiously still "active" at Renesas after 50 years or so. Yours may be some internally compensated variant of that.

Dunno if it's the cheapest way of receiving a differential digital signal.
 
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Offline D StraneyTopic starter

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Re: De-capping & circuit analysis of hybrid modules
« Reply #62 on: January 21, 2026, 07:16:05 pm »
MIL-STD-1553 Transceivers, Part 2: Marconi CT3231-M-FP
(Found on this board)
You can see the identical form factor of these modules, at bottom-left and bottom-right, to the previous one:


However, the some of the differences are obvious upon opening:


Here's a 2nd look at the previous National Hybrid module, to show how much more complicated it is:


The Marconi module only has a single layer of conductors (with occasional wirebond jumpers), while the National Hybrid module has at least 2 layers of conductors.  The dark blue color is an insulating layer that separates the two layers.  So at a minimum, the hybrid module itself is simpler & cheaper to manufacture with the Marconi one, needing fewer process steps.

How do they get away with a design that's so much simpler?  The answer lies in the ICs.  There's only 3 of them - the smallest is a simple, off-the-shelf 74LSR00 quad NAND gate:


...but the other two seem custom.  One is marked "CT11":


...and the other is marked "CT12":


They both also contain the text "MCE".  This likely stands for "Micro Circuit Engineering", a British company which seems to have been mostly active in the 70's-90's (can't find any trace of them now).  The "MCE" name pops up occasionally on various mostly-UK avionics I've seen.

Here's the schematic of the receive section:

The connections from U1's input pins 2 & 3 strongly suggest that there's an op-amp inside in a classic difference amplifier configuration.  R15 & R16 are the voltage divider on the non-inverting input, and R17 & R19 are the input & feedback resistors for the inverting input.  The rest of the connected components (R20-R22, C8-C10) seem likely part of an EMI-and-reflections-removal filter, similar to the Sallen-Key filter on the National Hybrid module.
(I think I guessed the Q7 & Q8 connections wrong; connecting the base and collector together makes more sense than collector and emitter, putting them in an "ideal diode" configuration)

Here's the transmit section:


Except for the biasing details of the linear output drivers, everything outside the ICs in both receive and transmit sections is pretty similar to the National Hybrid part.  You can see that they've rolled all the functions of the many logic gates, op-amps, comparators, etc. and even the output-driver's discrete-transistor feedback loop from the previous module into these custom MCE ICs.

There's obviously some tradeoffs here.  With custom ICs, the hybrid module itself is simpler & more reliable, with fewer wiring layers, fewer components to source/inventory/assemble, and many fewer wirebonds and solder joints (possibly the most failure-prone aspects?).  However, they now have the extra time investment, cost, and inflexibility of having to design and then rely on a single source of custom ICs.  The National Hybrid module could've used equivalent ICs from any number of manufacturers if they had sourcing problems - there are plenty of 74LS-series logic gates, op-amps with similar specs, TL431 equivalents, and similar comparators out there.  If Marconi had problems getting their special ICs from MCE, though, it would take a whole lot of time & money (if not licensing issues too!) to take their custom design to a different IC manufacturer, have it manufactured on a new process, and the specs qualified.

In the end, neither choice is "wrong": both have their own advantages and disadvantages, and make more sense in different contexts.  The same tradeoffs appear, even without custom ICs, when designing on the PCB level - do you (1) choose a special-purpose all-in-one chip that comes from one manufacturer and is irreplaceable, or do you (2) make the functions you need out of somewhat-generic building blocks (op-amps, logic gates, etc.) with only a few parts (like processors or ADCs/DACs) that don't have lots of drop-in replacements?  For portable devices, you're often forced to use choice #1, just to fit size constraints - large companies also can take this approach, as they have more leverage with semiconductor manufacturers (or can buy enough chips for a full lifetime production run, so unexpected discontinuation of parts isn't an issue).  For small-run or one-off R&D projects, long-lifetime designs meant to be repairable/manufacturable for decades, or for small groups or companies that are at the whims of semiconductor manufacturers and distributors, though, the second approach is usually better.  The Great COVID Chip Shortage I'm sure left its mark on many engineers - the experience of watching distributor stock fluctuate wildly and having to change designs multiple times in quick succession pushed me from a slight preference for approach #2, to a "follow approach #2 absolutely whenever possible" style of design.

Anyways, hope this was an interesting look inside.  If more of these pin-compatible MIL-STD-1553 transceivers turn up (from DDC, for example) I'll be taking them apart too to compare.
 
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Offline David Hess

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Re: De-capping & circuit analysis of hybrid modules
« Reply #63 on: January 23, 2026, 01:19:03 am »
Looks like Harris complementary bipolar process and the chip is somewhat similar to this one, which I thought was a rebadged HA-2520, curiously still "active" at Renesas after 50 years or so. Yours may be some internally compensated variant of that.

Dunno if it's the cheapest way of receiving a differential digital signal.

If it was from Harris, then their complementary bipolar process used dielectric isolation, so it would have inherent enhanced radiation resistance.  That by itself might be a good enough reason to use it.
 
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