Detailed Reverse Engineering & ASIC Analysis of the Infineon 24GHz Doppler Radar

[Hugoneus]

You can watch the video here: [25 Minutes]

youtu.be/Sgdxd2F_CFs

Description:

In this episode Shahriar takes a close look at the Infineon 24GHz doppler radar module in the spirit of the upcoming IEEE ISSCC 2023 Conference:

https://www.isscc.org/

The 24GHz radar module block diagram and its principle of operation is presented in details as well as the X-Ray of the PCB. Various design techniques and architectures are also explained. The RFIC ASIC is then extracted from the QFN package and examined under the microscope. The internal ASIC elements are correlated to the block diagram with discussions about various mm-wave layout techniques & high-frequency circuit design.

[mawyatt]

Very nice, well done

Wish we could attend the ISSCC, always looked forward to this conference and attended for a few decades, but now retired and no real business case to justify such

Of course if somewhat wanted to send us, then we would reconsider 

BTW the different metal patterns are likely to help keep the planarity within the inductor structures just like the "fill" is for elsewhere. We did similar techniques within the IBM SiGe BICMOS (7, 8 & 9HP) as early developers since any metallization under the inductors reduces the "Q" due to induced fields within the metal structures, so it's basically how little inductor fill you can get away with!! We had various experimental structures with different metallization patterns under the inductors that was segmented to "break" the current paths to reduce loss, but still maintain planarity.

Anyway, sounds like an interesting topic for your tutorial, and thanks for the excellent video!!

Tell Prof Rabeiz Mike Wyatt said hi

Best,

[Hugoneus]

Very nice, well done

Wish we could attend the ISSCC, always looked forward to this conference and attended for a few decades, but now retired and no real business case to justify such

Of course if somewhat wanted to send us, then we would reconsider 

BTW the different metal patterns are likely to help keep the planarity within the inductor structures just like the "fill" is for elsewhere. We did similar techniques within the IBM SiGe BICMOS (7, 8 & 9HP) as early developers since any metallization under the inductors reduces the "Q" due to induced fields within the metal structures, so it's basically how little inductor fill you can get away with!! We had various experimental structures with different metallization patterns under the inductors that was segmented to "break" the current paths to reduce loss, but still maintain planarity.

Anyway, sounds like an interesting topic for your tutorial, and thanks for the excellent video!!

Tell Prof Rabeiz Mike Wyatt said hi

Best,

Thanks Mike! I will be sure to let Gabriel know.

The exclusion of metal-fill inside the VCO tank inductor must have been at the edge of what they are allowed to do. Of course there is no chance of this in finFETs... I don't think the Infineon SiGe process has very strict local density requirements, but never the less, they chose to allow the fill to sit everywhere else. Not that is would make much of a difference at 24GHz.

[joeqsmith]

Unrelated, I watched the end of your video on 3D printing where you show some waveguides.  Have you considered making a follow up video to this? 

[Hugoneus]

Unrelated, I watched the end of your video on 3D printing where you show some waveguides.  Have you considered making a follow up video to this?

I could. I was going to CNC some too.

[mawyatt]

Thanks Mike! I will be sure to let Gabriel know.

The exclusion of metal-fill inside the VCO tank inductor must have been at the edge of what they are allowed to do. Of course there is no chance of this in finFETs... I don't think the Infineon SiGe process has very strict local density requirements, but never the less, they chose to allow the fill to sit everywhere else. Not that is would make much of a difference at 24GHz.

Yeah, recall the FinFETs were extremely sensitive to any planarity issues being dominantly vertical structures. Are there any SiGe BiCMOS that use FinFET? Been out of the loop for awhile and remember lobbying IBM to offer a SiGe BiCMOS FinFET process along with Thru Silicon Vias. We failed, mainly because they had bigger problems with the SOI FinFET thermal issues, which eventually killed IBMs SOI FinFET technology (which was ideal for analog/RF use) and they adopted the junction isolated version which had better thermal conductivity from the FET body to substrate.

Took a quick look at the conference, looks like lots of interesting topics!!

Best,

[joeqsmith]

Unrelated, I watched the end of your video on 3D printing where you show some waveguides.  Have you considered making a follow up video to this?

I could. I was going to CNC some too.

I am playing around with waveguides in the X-band for the fun of it and someone suggested I watch your video.  It was very interesting.  Would really have enjoyed seeing more testing with this.   Many of the papers I have read show using 3D metal printing.   

Thinking the surface finishes and tolerances at these low frequencies I am playing with would be far less critical.  Planning to try a few tests of my own. 

[Hugoneus]

Unrelated, I watched the end of your video on 3D printing where you show some waveguides.  Have you considered making a follow up video to this?

I could. I was going to CNC some too.

I am playing around with waveguides in the X-band for the fun of it and someone suggested I watch your video.  It was very interesting.  Would really have enjoyed seeing more testing with this.   Many of the papers I have read show using 3D metal printing.   

Thinking the surface finishes and tolerances at these low frequencies I am playing with would be far less critical.  Planning to try a few tests of my own.

Great. I'll let you know when I try something next.

[joeqsmith]

Unrelated, I watched the end of your video on 3D printing where you show some waveguides.  Have you considered making a follow up video to this?

I could. I was going to CNC some too.

I am playing around with waveguides in the X-band for the fun of it and someone suggested I watch your video.  It was very interesting.  Would really have enjoyed seeing more testing with this.   Many of the papers I have read show using 3D metal printing.   

Thinking the surface finishes and tolerances at these low frequencies I am playing with would be far less critical.  Planning to try a few tests of my own.

Great. I'll let you know when I try something next.

Sorry to derail your thread.  Attached link is where I've been posting.  Feel free to add anything you like there.  I am planning to make several test horns to try some different approaches.   The first will be to replicate your test using that spray coating.   
 
https://www.eevblog.com/forum/rf-microwave/experimenting-with-waveguides-using-the-litevna/

[glradio]

Can this motion sensor be set in a kind of “listen-only” mode, so as to detect radio sources emitted by other sensors operating at similar frequencies, and see the signal with RTL-SDR on SDR# or the like ?