Digital SMPS controller

[blueskull]

Hi all. Is there a recommendation on which digital SMPS controller to use for a hobby project?
The needs are listed:
1. PWM controls for 2 half bridges, one for totem-pole bridge-less PFC, the other for a half bridge converter. Both operate at fixed frequency, both shall support pulse skipping, forced CCM only. PFC switches at 150kHz~250kHz, half bridge converter operates at 500kHz fixed. Totally 2 pairs of complementary PWM outputs needed. Delay line based 1ns resolution needed, timer-only based PWM is not an option.
2. 12bit+ ADC, sampling at at least 1Msps, multiple channels interleaved for PFC voltage feedback, PFC current feedback, AC voltage sensing, and isolated output voltage sensing (maybe isolated sigma delta converter or conventional TL431+optocoupler).
3. CPU power to process ADC data, PFC operates in average current mode as inner control loop, and voltage mode in outer control loop, half bridge converter operates in voltage mode. All compensators for 3 loops are presumably 2P2Z. Control loops update at at least 100kHz including interrupting overheads.
4. Physically, as low power as possible, as small as possible, must be in a lead-less packaging such as QFN/DFN/BGA/CSP.
5. A debugging UART interface is preferred, watchdog is a must, others digital peripherals besides PWM are not necessary. Flash should be enough for some basic control code and printf/scanf without floating number support.

Here are few candidates I already know:
1. TI UCD3028 in 6*6 QFN36 package, hardware digital 3P3Z control, no PFC capability, but can be added by controlling outer loop with CPU and using DAC to drive reference of inner loop. 6-bit narrow range 1mV resolution error ADC, 250ps PWM, free IDE.
2. TI F28035 in 7*7 QFN56 package, software control only, with CLA and DSP cores both running at 60MHz, 3.5Msps 12-bit ADC, 300ps PWM, free IDE.
3. Microchip dsPIC33EP16GS202 in 4*4 QFN28 package, software control only, 16-bit dsPIC core running at 60MHz (actually 70, but 60 is over entire temp range), 3.25Msps 12-bit ADC, low power consumption (compared with previous two), 1ns PWM, $995 compiler PRO license.

Both should be able to do the job, but I prefer the third for its small size and low power consumption, also its ICSP is easier to use compared to the others'. However, the $995 cost is something I don't want to spend. I can get started by using the free license, and only switch to pro license afterwards. Personally I don't have experience with ARM7, nor any UCD chips, so I would say it might need some learning curve. I work with Delfino DSPs extensively at work, so switching to Piccolo should be easy. I've never worked with dsPIC either, but I did work with 8-bit PIC, if that matters.

Any ideas are welcomed.

[ali_asadzadeh]

Try ST for everything including Mosfet and Diodes, I suggest you maybe able to decrease loop frequency to be able to do it with only a few 0.5USD cortex M0 from ST (STM32F030K6T6) , I'm designing something similar with a 0.5USD ST MCU for each part. a separate one for example for PFC control only, in this way you are true "multie-core" with insanely easy and cheap way of doing it!

[technix]

STC15W401AS + TL431 external reference. 35MHz 1T 8051 core. Does everything (except the 10-bit ADC.) Super cheap (less than $1 total.)

[ali_asadzadeh]

STC15W401AS + TL431 external reference. 35MHz 1T 8051 core. Does everything (except the 10-bit ADC.) Super cheap (less than $1 total.)

STM32F030K6T6 is 48MHz and have  :)1MSPS ADC and it's 32bit and it's 0.5USD

[coppice]

2. TI F28035 in 7*7 QFN56 package, software control only, with CLA and DSP cores both running at 60MHz, 3.5Msps 12-bit ADC, 300ps PWM, free IDE.

I don't think anything matches the C2000 family for digital power supplies, but the 38035 is not the best part for that job. Its a while since I looked through the range, so I can't remember the right part numbers, but there are parts battled hardened for power supply applications, with the bells and whistles needed to kept external circuitry to a minimum.

[rx8pilot]

I am about 1/3 of the way through a C2000 based project. Honestly I did not exhaust every possible option, but the C2000 jumped out early for all the reasons mentioned above. I doubt I will push it to the limits on my first try, but from what I have learned so far - its a seriously capable feature set.

Sent from my horrible mobile....

[JPortici]

i used that dspic, a very nice one! be careful though, read the errata. if memory serves right the shared ADC core has some issues (i only used core 1 2 and 3 so it didn't affect me) and interleaved mode has issues too. this has the same issues the ADC in pic32mz has (i think it's the same IP)
usually the ADC in dspics is very accurate

there is no need for compiler pro licence. it's GCC based, O1 can be enabled in "free" mode, it removes almost all the bloat and if you want you can recompile from sources and remove the licensing bit.

if you need i can share some code to set up the ADC, it's not really easy (compared to other PICs)

[znroot]

I would reccomend to you the TI's DSP TI F28035 because it is designed also to do smps controller. I used it in my fully-digital control of a full-bridge inverter (3.3KW output power) and it works very well.
It has also a nice feature called HREPWM which, thanks to a edge-positioning trigger signal, can improve your bit resolution by 3-4 bit maintaining the same CPU clock.


Anyway the CLA (+FPU) included into is very useful for a digital controller saving you many hours of headache caused by fixed point math 

[BravoV]

The needs are listed:
1. PWM controls for 2 half bridges, one for totem-pole bridge-less PFC, the other for a half bridge converter. Both operate at fixed frequency, both shall support pulse skipping, forced CCM only. PFC switches at 150kHz~250kHz, half bridge converter operates at 500kHz fixed. Totally 2 pairs of complementary PWM outputs needed. Delay line based 1ns resolution needed, timer-only based PWM is not an option.

2. 12bit+ ADC, sampling at at least 1Msps, multiple channels interleaved for PFC voltage feedback, PFC current feedback, AC voltage sensing, and isolated output voltage sensing (maybe isolated sigma delta converter or conventional TL431+optocoupler).

3. CPU power to process ADC data, PFC operates in average current mode as inner control loop, and voltage mode in outer control loop, half bridge converter operates in voltage mode. All compensators for 3 loops are presumably 2P2Z. Control loops update at at least 100kHz including interrupting overheads.

4. Physically, as low power as possible, as small as possible, must be in a lead-less packaging such as QFN/DFN/BGA/CSP.

5. A debugging UART interface is preferred, watchdog is a must, others digital peripherals besides PWM are not necessary. Flash should be enough for some basic control code and printf/scanf without floating number support.

As others suggested on C2000, and also looking at few highlighted items above, have you take a glance on C2000's guts like these for examples ? .... cause sometimes the devil is in the details. 

Pwm capabilities :

•  Achieve unprecedented precision with unparalleled high resolution duty-cycle control down to 55ps time steps
•  Reduce power-switching loses with high-resolution and configurable deadband support
•  Protect your system and add safety features with direct PWM  tripping from comparator or trip zone pin inputs
•  Flexible PWM outputs configurations, including dual-edge asymmetric and symmetric PWM generation
•  Programmable or hardware-locked PWM time and phase synchronization

[rx8pilot]

My project is also using eGaN Fets as well. Interesting challenges with those devices and I quickly discovered that custom digital control is the best way to take advantage of their characteristics. I got a great book from EPC that was helpful http://epc-co.com/epc/Products/Publications.aspx

[rx8pilot]

...... but I do have my secret weapon -- a self invented topology that gets rid of inductors, both output filter one and LLC resonant one, without using customized gapped core, and the film capacitor of LLC as well, while still allowing me to get arbitrary voltage transfer ratio and ZVS at the same time.
I do have the confidence, though, as I don't have a budget -- I can use whatever expensive parts and whatever counterproductive assembly structures as I wish, and I (am about to) have a PhD in power electronics.

BTW, I'm using GaN Systems devices and considering moving to Navitas, though I will probably have to sign an NDA if I do so. Someone in the lab next door made a MHz PFC with Navitas devices and they just published their works days ago. The results are very promising.

Hire me. I work hard!

[BravoV]

Keep us posted on this cool smps will ya.

[jbb]

... and I (am about to) have a PhD in power electronics.

Do Microchip offer an academic license?  That might solve your $995 compiler problem.

[JPortici]

More info: https://www.eevblog.com/forum/microcontrollers/is-microchip-violating-the-gpl/msg1009052/#msg1009052

[coppice]

ATM I decided to go with dsPIC33. The TI offerings are just too power hungry to achieve my efficiency requirements.

Which dsPIC33 are you looking at? Power consumption, for real applications scenarios, usually favours the C2000.

[BravoV]

ATM I decided to go with dsPIC33. The TI offerings are just too power hungry to achieve my efficiency requirements.

Curious how much power that TI chip consumes compared to dsPIC33 ? Which TI chip is that ?

[JPortici]

I use extensively the dsPIC33EV family and i can confirm blueskull's numbers for it.
in a current prototype with dspic33EV and 25AC eeprom, with the eeprom idle i get about 16mA at room temperature
-5V
-16 MIPS
-peripherals enabled: 2xSENT 3xTIMER 2xOC 1xI2C 1xUART.
scaling it for his scenario (3V3, increased speed, all peripherals on) 20 mA are believable at room temp.

[rx8pilot]

GS202, 16 KB variant. Datasheet says 20mA at 60MHz, compared to 120mA for F28035. The power saving gets me 0.2% higher overall efficiency for free. That's without CLA and other peripherals counted. If other peripherals like adc and pwm are counted, the power difference will only be higher.

As long as the GS202 has the performance to take full advantage of your design. I don't know anything about that chip, but it is worth looking at the architectural details to see if you gain .2% 'for free' while some other limitation of the architecture is costing you .5%.

[insine]

You may also consider STM32F334.
It is 72MHz ARM Cortex M4 with FPU, 217ps resolution PWMs and 5MSps 12 bit ADCs.
Seems quite nice, but no QFN packages though.

[diyaudio]

Novel/Experimental evm designs seems to be in the marketing circles (also to push the sales agenda), I have some serious concerns about the practicality of a fully "Digital SMPS Design" in the real world (of which few actually exists)

1) Control logic Voltage and Current loops are essentially real-time code.

2) With the above said, debugging is extremely tricky, so much potential to destroy the output stage or seriously damage the power stage with software breakpoints latching critical control signals or creating erratic timing issues.
 
3) Debugging, designing even a simple Type-II compensator is over kill using signal processing code, it takes alot of of CPU resources to execute real-time signal processing calculations and well tested robust algorithms.
       
However with that said, having a mix mode design could be useful and much more predicable.

1) Design the inner loop(s) using existing Analog domain knowledge.
2) Let the CPU perform sub critical functions like real-time frequency monitoring, supply the core oscillator, drive the PWM and offer sub critical PID/PD control functions.

Its an interesting subject to experiment with.       

 

[coppice]

Novel/Experimental evm designs seems to be in the marketing circles, I have some serious concerns about the practicality of a fully "Digital SMPS Design" in the real world (of which few actually exists)

There are numerous challenges in creating a digitally controlled SMPS which is rock solid stable under all conditions, but they do exist in large numbers. They are mostly supplies above 1kW, and they are mostly supplies where the customer is prepared to pay extra for the maximum possible efficiency. However, they are gradually creeping down the range. Some PC supplies, and quite a lot of server supplies, are now digitally controlled.

[diyaudio]

Novel/Experimental evm designs seems to be in the marketing circles, I have some serious concerns about the practicality of a fully "Digital SMPS Design" in the real world (of which few actually exists)

There are numerous challenges in creating a digitally controlled SMPS which is rock solid stable under all conditions, but they do exist in large numbers. They are mostly supplies above 1kW, and they are mostly supplies where the customer is prepared to pay extra for the maximum possible efficiency. However, they are gradually creeping down the range. Some PC supplies, and quite a lot of server supplies, are now digitally controlled.

I'm picturing Morpheus asking Neo, from the clip from the Matrix: what is "digitally controlled"?

It would be intresting to know what "digitally controlled" means ? are those lines blurred, is it hybrid mix mode like the above mentioned or is it a ti, st, microchip part ect with propriety signal processing code on the flash?
 
 

[coppice]

Novel/Experimental evm designs seems to be in the marketing circles, I have some serious concerns about the practicality of a fully "Digital SMPS Design" in the real world (of which few actually exists)

There are numerous challenges in creating a digitally controlled SMPS which is rock solid stable under all conditions, but they do exist in large numbers. They are mostly supplies above 1kW, and they are mostly supplies where the customer is prepared to pay extra for the maximum possible efficiency. However, they are gradually creeping down the range. Some PC supplies, and quite a lot of server supplies, are now digitally controlled.

I'm picturing Morpheus asking Neo, from the clip from the Matrix: what is "digitally controlled"?

It would be intresting to know what "digitally controlled" means ? are those lines blurred, is it hybrid mix mode like the above mentioned or is it a ti, st, microchip part ect with propriety signal processing code on the flash?

Practically everything in a modern digital supply is digital. They may have analogue emergency controls, such as overcurrent protection, although even those features are gradually moving to all digital control. If you want really tight and repeatable control loops for a very high efficiency supply, digital control is the way to go.

[Siwastaja]

Novel/Experimental evm designs seems to be in the marketing circles (also to push the sales agenda), I have some serious concerns about the practicality of a fully "Digital SMPS Design" in the real world (of which few actually exists)

1) Control logic Voltage and Current loops are essentially real-time code.

2) With the above said, debugging is extremely tricky, so much potential to destroy the output stage or seriously damage the power stage with software breakpoints latching critical control signals or creating erratic timing issues.
 
3) Debugging, designing even a simple Type-II compensator is over kill using signal processing code, it takes alot of of CPU resources to execute real-time signal processing calculations and well tested robust algorithms.

Clearly, it's not suitable for you, but otherwise, my personal opinion about your personal opinion is: bullshit.

It's always funny when you are doing something in the real world, and someone comes and says it's not done in the real world. Apparently, we live in different worlds.

My latest fully-MCU controlled SMPS design has blown power stage FETs once. The previous analog, MCU-controlled iteration blew dozens.

It's not that simple to judge. It depends on details, conditions, and the experience of the designer. Most importantly, the field of experience. It's engineering, not politics!

In any case, your wording shows you clearly have no idea what you are talking about. It's not a dichotomy of real-time software vs. analog at all. Modern digital SMPS, completely done inside an MCU, practically always means configuring a bunch of blocks designed to build SMPS controllers, some digital, some analog, to work together. Sometimes there is not a single line of "real time code", whatever it means.

For example, peak current mode controller can be implemented so that the most important piece of control is "analog", and it still happens inside said digital SMPS controller MCU. It has the DACs, comparators and PWM generation units capable of triggering from the comparator output. Once configured, no code required to do anything timing-critical. Image on post #8 shows this.

Debugging a digital SMPS controller is the best thing ever. You have the visibility! Think about the traditional integrated SMPS controller chip - you have no visibility of the internal signals at all, you only have the huge block diagram from the datasheet, sometimes poorly specified. With the MCU, I can program whatever control structure I want, and I can program any complex scheme of triggering to an interesting event and then storing kilobytes of fast traces which I can print out to UART and plot.

Of course, it takes some specific skills to do all this. It's clearly not for everyone; OTOH, switch-mode supplies are not trivial in any case.

[coppice]

It would be intresting to know what "digitally controlled" means ? are those lines blurred, is it hybrid mix mode like the above mentioned or is it a ti, st, microchip part ect with propriety signal processing code on the flash?

Usually ramp compensation and desaturation are done in hardware, using comparators and precision DACs, while all control loop things are done digitally, either using fixed logic fabric (like TI UCD28xx), or using DSP/CLA cores (like TI Piccolo/Delfino).
SMPS optimized MCUs usually have analog peripherals for ramp compensation and some protections, so a single chip solution is possible. For control loop acceleration, many SMPS optimized MCUs have smart PWM and ADC, which can offload a lot of things from CPU, such as PWM delay line calibration and computing, ADC protection tripping, ADC sequencing and many more.

The other key thing these controller devices have is the ability to get a value from the ADC, perform the loop filtering, and apply updates to the PWM hardware within a cycle of the PWM. This keeps the loop delay really low, maximises the control loop's phase margin, and allows a really crisp impulse response. Devices like the C2000 have many of the qualities of a DSP (e.g. a MAC) but puzzle the average DSP developer, who expects a DSP chip to have extensive DMA functionality. These things are, instead, optimised for tight control loops, typically with all the important work happening in the ADC interrupt routine, or a dedicated hardware path, like the TI CLA module.