Electronic load slew rate control

[prutser]

I am planning to build a (digitally controlled) electronic load. But also want to implement programmable slew rate control for dynamic testing.  Preferably up to 3A/us.
One option is to use a high speed DAC and to generate the ramp digitally, this seems however rather overkill since I probably need a parallel DAC with FPGA to load it fast enough.

Another option which came into my mind, is feeding the DAC output though a current source which charges a capacitor. This will work probably in the middle range due to current source compliance, but now at the low and the high limit. Besides that temperature effects of the current source will probably 'destroy' the resolution of the DAC.

For dynamic testing, I was considering 2 DACs and to switch between both DAC outputs. Somehow to be able to have a programmable ramp between the 2 levels would be nice.

Anyone a nice idea (or knows how commercial electronic loads implement slew rate control) ?

[Terry Bites]

Can your electonic load really deliver unlimited slew rates over 3MA/s ?
I'm scared you'll open up a black-hole!

[PartialDischarge]

Can your electonic load really deliver unlimited slew rates over 3MA/s ?

You must be kidding, 3A/us is pretty slow for a modern switcher

[prutser]

Correct 3A/us is not exceptional. A siglent SDL1000X can do 2.5A/us.  Since the max current of the load will be 10A, the 1MA will not be reached 
But I have to admit, the analog part will be a challenge.

[Terry Bites]

With a few milliohms of cable leading to your source your into kV/s. no?

[T3sl4co1l]

Well what, is this 3A/us out of a range of 100mA or 100A?  One will be much easier than the other!

Actually it's probably a bit easier somewhere in the middle of that range, but that's not important.

If you have sufficient analog bandwidth to achieve the desired slew rate as it is, then just any means of generating that signal will do.  If you have a reasonably fast DAC in terms of risetime (slew rate in excess of desired), then a slew rate limiter circuit will get you that desired slew rate for any step change in setpoint.  The step changes themselves need not be often, hence the sample rate can be much lower.

If you can be more specific about what kinds of waveforms you wish to generate, there may be other ideas to explore too.

Tim

[PartialDischarge]

One of the problems is what slew rate is going to be, define it. I believe scopes measure the center part of the pulse, which probably has the steepest slope, ie the maximum of the derivative of the waveform.

[prutser]

@tim

What I try to achieve is a (near) linear ramp. f.i. Assume the V-I conversion is ideal (which it probably isn't) and which with an input from 0-3V results in an output current from 0-3A I want to be able
to go from 1V to 2.5V with a linear ramp with a programmable slope.  Can be an approximation, but I like to avoid a ADC with an update rate of 500ns or faster.

[T3sl4co1l]

Adjustable ramp between steady values, can use a slew rate circuit such as CCS (use a source and sink pulling the "DC" terminals of a FWB, signal thru the AC terminals) into capacitor, with CCS programmable from DAC.

Or use an OTA, which is fine at this speed (LM13700).

Tim

[David Hess]

The way I have seen it done in high speed circuits is with a diode bridge.  The input to the bridge is driven from the source, and the output goes to a capacitance which is then buffered to create an output.  The current through the bridge is then set to create the limited slew rate into the capacitor.  The output will now follow the input up to the slew rate enforced by the bridge current.  Accuracy is limited by the matching of the diodes, so potentially less than a millivolt.

Or use an OTA, which is fine at this speed (LM13700).

An operational transconductance amplifier is another way.  The LT1228 is another such part but much faster than the LM13700.

[lukaev3]

The way I have seen it done in high-speed circuits is with a diode bridge.

I haven't found anything about it on the internet, can you maybe elaborate further how it works and how it is connected, I also want to generate a Slewrate limited signal.
Thanks in advance!

[David Hess]

I haven't found anything about it on the internet, can you maybe elaborate further how it works and how it is connected, I also want to generate a Slewrate limited signal.

Here is an example circuit where it was used for triangle wave generation in a function generator.

The diode bridge is driven on the left side, and buffered by a high impedance JFET follower on the right side.  U121, Q121, and Q143 operate as a current source and sink on the top and bottom of the diode bridge.  When a low impedance analog signal is applied to the left side, the current through the diode bridge from top to bottom replicates it on the right side of the diode bridge, however the output current is limited by the current source and sink at the top and bottom.  Since the current is limited, a capacitor across the output will limit the slew rate no matter what the input signal does.

This type of slew rate limiter is suitable for very high frequencies and slew rates, but also works fine at lower slew rates.  The slew rate is controlled by the current and the capacitance at the output.

This type of diode bridge also works for input and output protection because it will duplicate the input at the output but only up to the currents and compliance voltages of the current source and sink.  This makes it suitable for protecting an RF input with instantaneous response, but it could also be used to protect a signal output when connected to a damaging signal.